A consistent framework for load-line regulation design is presented, applicable to microprocessor voltage regulators (VRs) using either electrolytic or ceramic output capacitors. With conventional feedback control, the loop bandwidth is limited by stability constraints linked to the switching frequency. The output capacitor has to be chosen sufficiently large to meet the stability requirement. Load-current feedforward can extend the useful bandwidth beyond that imposed by feedback stability constraints. With load-current feedforward, the size of the output capacitor can be reduced, since it is determined solely by large-signal and switching-ripple considerations which are shown to be less constraining than the feedback stability requirement. This work points to the feasibility of microprocessor VR implementations using only a small number of ceramic output capacitors, while running at sub-megahertz switching frequencies

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Load-Line Regulation With Estimated Load-Current Feedforward: Application to Microprocessor Voltage Regulators

Many commercial controller implementations for dc-dc converters are based on pulse-width modulation (PWM) and small-signal analysis. Increasing switching frequencies, linked in part to wide bandgap devices, provide the opportunity to increase operating bandwidth and enhance performance. Fast processors and digital signal processing offer new computational techniques for power converter control. Conventional control techniques rarely make full use of operating capability. The objectives of this paper are to present an overview and link to literature on conventional modulation and control techniques for hard-switched dc-dc converters, identify performance limits associated with conventional small-signal-based design, discuss geometric control approaches, and compare strategies for control tuning. The discussion shows how current mode controls have alternative state feedback implementations, and describes unusual opportunities for large-signal control tuning. Considerations for minimum response time are described. Comparisons among tuning methods illustrate how geometric controls can achieve order of magnitude dynamic performance increases. The paper is intended as a baseline tutorial reference for future work on power converter control.

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A Tutorial and Review Discussion of Modulation, Control and Tuning of High-Performance DC-DC Converters Based on Small-Signal and Large-Signal Approaches

This paper proposes the modeling and controller design of an autonomous PV module (APVM) which is composed of a PV panel and a four-switch buck-boost converter (FSBBC) for series-connected distributed maximum power point tracking (DMPPT) PV system applications. The FSBBC can operate in buck, boost, and buck-boost modes with less passive component counts and noninverted output voltage polarity. The switching strategy of the FSBBC with smooth transition during mode change is explained. The parameter design criteria and the small-signal ac model of the APVM are developed. Moreover, the design of controller based on the developed small-signal ac model and the stability analysis of the APVM are presented. Computer simulation and hardware experiment results are used to verify the accuracy of the small-signal model and the controller performance of the APVM.

Modeling and Controller Design of an Autonomous PV Module for DMPPT PV Systems

Adaptive voltage positioning (AVP) has been used in multiphase voltage regulator module (VRM) applications. A novel scheme, called AVP+, is analyzed in this paper. Small signal model is used to look into the control performance issues such as output impedance and stability. The model has been verified in the experiments and simulations. Compared to a conventional AVP schemes, the present scheme provides better stability margin and output- impedance performance. This is especially true for the prevailing trend of using ceramic output capacitors and high switching frequency. The focus of the present paper is the small-signal modeling for control loop design using the AVP+ scheme which was never analyzed before. And the comparisons were made between AVP+ and AVP- on the stability and output impedance performance.

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Modeling and Design for a Novel Adaptive Voltage Positioning (AVP) Scheme for Multiphase VRMs

In this paper, an adaptive droop resistance (ADR) technique can compensate for the adaptive voltage positioning (AVP) control in a boost dc-dc converter. A loop analysis is derived with the AVP technique to show the effects of the right-half-plane (RHP) zero. When the value of RHP zero is above the equivalent series resistance (ESR) zero, constant output impedance can be guaranteed by the proposed compensation method. Once the value of RHP zero is below five times of ESR zero, the proposed ADR technique can vary the droop resistance to track the variation of the load current to increase the system stability. In case of load current variation, the output impedance is proven constant due to the implementation of the AVP technique in the boost converter. The transient response time is 22 μS when a 200-mA load current step occurs, which is faster than that of a conventional boost converter. Even at heavy loads, the ADR technique can ensure a fast and stable transient response without being affected by the RHP zero. The experimental results demonstrate that the proposed method can increase system stability and guarantee a fast transient response in the design of a boost converter with the AVP technique.

Adaptive Droop Resistance Technique for Adaptive Voltage Positioning in Boost DC–DC Converters

This paper investigates the relationship between the control bandwidth and the load transient response in voltage regulator modules (VRMs), which are designed with multiphase interleaving synchronous buck converters. Both voltage- and current-mode controls are discussed. A critical bandwidth value is discovered, beyond which pushing the bandwidth can no longer reduce the output voltage spike during the load transient response. Also, the critical bandwidths are different according to different kinds of output capacitors. The critical bandwidth concept highlights the trend of high-frequency VRM design that uses ceramic capacitors to achieve smaller size and faster load transient response. Simulation and experimental results prove the theoretical analysis.

Kaiwei Yao

Papers

Critical bandwidth for the load transient response of voltage regulator modules