K
Kamalesh Hatua
Researcher at Indian Institute of Technology Madras
Publications - 106
Citations - 1933
Kamalesh Hatua is an academic researcher from Indian Institute of Technology Madras. The author has contributed to research in topics: Insulated-gate bipolar transistor & Gate driver. The author has an hindex of 21, co-authored 82 publications receiving 1516 citations. Previous affiliations of Kamalesh Hatua include Indian Institute of Science & North Carolina State University.
Papers
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Solid-State Transformer and MV Grid Tie Applications Enabled by 15 kV SiC IGBTs and 10 kV SiC MOSFETs Based Multilevel Converters
Sachin Madhusoodhanan,Awneesh Tripathi,Dhaval Patel,Krishna Mainali,Arun Kadavelugu,Samir Hazra,Subhashish Bhattacharya,Kamalesh Hatua +7 more
TL;DR: In this article, a transformerless intelligent power substation (TIPS) is proposed as a three-phase SST interconnecting a 13.8 kV distribution grid with a 480 V utility grid.
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Active Damping of Output $LC$ Filter Resonance for Vector-Controlled VSI-Fed AC Motor Drives
TL;DR: A simple active damping technique is proposed for lossless damping of vector-controlled ac motor drives with an LC filter and is carried out in the three-phase domain for better accuracy of the control.
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A Transformerless Intelligent Power Substation: A three-phase SST enabled by a 15-kV SiC IGBT
Krishna Mainali,Awneesh Tripathi,Sachin Madhusoodhanan,Arun Kadavelugu,Dhaval Patel,Samir Hazra,Kamalesh Hatua,Subhashish Bhattacharya +7 more
TL;DR: The solid-state transformer (SST) is a promising power electronics solution that provides voltage regulation, reactive power compensation, dc-sourced renewable integration, and communication capabilities, in addition to the traditional step-up/stepdown functionality of a transformer as mentioned in this paper.
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Parasitic Inductance and Capacitance-Assisted Active Gate Driving Technique to Minimize Switching Loss of SiC MOSFET
TL;DR: An active gate driving technique is proposed, which allows inverter to operate with moderate amount of layout parasitic inductance and load parasitic capacitance and dramatically reduces switching loss of the SiC MOSFET with the help of existing parasitic elements.
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Design Considerations and Performance Evaluation of 1200-V 100-A SiC MOSFET-Based Two-Level Voltage Source Converter
Samir Hazra,Sachin Madhusoodhanan,Giti Karimi Moghaddam,Kamalesh Hatua,Subhashish Bhattacharya +4 more
TL;DR: In this paper, a two-level voltage source converter (2L-VSC) using SiC MOSFETs and Si IGBTs is presented, which is operated to supply 35 kVA load at 20-kHz switching frequency with dc bus voltage of 800 V and corresponding experimental results are presented.