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Showing papers by "Karol Kalna published in 2003"


Journal ArticleDOI
TL;DR: A 3D drift-diffusion device simulator has been developed to effectively simulate pseudomorphic high electron mobility transistors (pHEMTs) on a distributed memory multiprocessor computer.
Abstract: The use of 3D simulations is essential in order to study the effects of fluctuations when devices are scaled to deep submicron dimensions. A 3D drift-diffusion device simulator has been developed to effectively simulate pseudomorphic high electron mobility transistors (pHEMTs) on a distributed memory multiprocessor computer. The drift-diffusion equations are discretized using a finite element method on an unstructured tetrahedral mesh. The obtained set of equations is solved in parallel on an arbitrary number of processors using the message-passing interface library. We have applied our simulator to a 120 nm pHEMT based on the Al0.3Ga0.7As/In0.2Ga0.8As interface and carried out a calibration to real experimental data.

9 citations


Proceedings ArticleDOI
16 Sep 2003
TL;DR: In this article, an InGaAs/InAlAs based HEMT structure, lattice matched to an InP substrate, is presented in which drive current and transconductance has been optimized through a double-delta doping strategy together with an increase in channel carrier density.
Abstract: An InGaAs/InAlAs based HEMT structure, lattice matched to an InP substrate, is presented in which drive current and transconductance has been optimized through a double-delta doping strategy Together with an increase in channel carrier density, this allows the use of a non-annealed ohmic contact process HEMT devices with 120 nm standard and self-aligned T-gates were fabricated using the non-annealed ohmic process At DC, self-aligned and standard devices exhibited transconductances of up to 1480 and 1100 mS/mm respectively, while both demonstrated current densities in the range 800 mA/mm At RF, a cutoff frequency f/sub T/ of 190 GHz was extracted for the self-aligned device The DC characteristics of the standard devices were then calibrated and modelled using a compound semiconductor Monte Carlo device simulator MC simulations provide insight into transport within the channel and illustrate benefits over a single delta doped structure

3 citations


Journal Article
TL;DR: In this paper, impact ionization and thermionic tunnelling are investigated in scaled pseudomorphic high electron mobility transistors (PHEMTs) by Monte Carlo (MC) device simulations.
Abstract: Impact ionization and thermionic tunnelling as two possible breakdown mechanisms in scaled pseudomorphic high electron mobility transistors (PHEMTs) are investigated by Monte Carlo (MC) device simulations. Impact ionization is included in MC simulation as an additional scattering mechanism whereas thermionic tunnelling is treated in the WKB approximation during each time step in selfconsistent MC simulation. Thermionic tunnelling starts at very low drain voltages but then quickly saturates. Therefore, it should not drastically affect the performance of scaled devices. Impact ionization threshold occurs at greater drain voltages which should assure a reasonable operation voltage scale for all scaled PHEMTs.

3 citations


Journal Article
TL;DR: In this paper, impact ionization and thermionic tunnelling are investigated in scaled pseudomorphic high electron mobility transistors (PHEMTs) by Monte Carlo (MC) device simulations.
Abstract: Impact ionization and thermionic tunnelling as two possible breakdown mechanisms in scaled pseudomorphic high electron mobility transistors (PHEMTs) are investigated by Monte Carlo (MC) device simulations. Impact ionization is included in MC simulation as an additional scattering mechanism whereas thermionic tunnelling is treated in the WKB approximation during each time step in selfconsistent MC simulation. Thermionic tunnelling starts at very low drain voltages but then quickly saturates. Therefore, it should not drastically affect the performance of scaled devices. Impact ionization threshold occurs at greater drain voltages which should assure a reasonable operation voltage scale for all scaled PHEMTs.

2 citations


Journal ArticleDOI
TL;DR: In this paper, the performance potential of an 80 nm physical gate length MOSFET with GaAs channel and high-k gate insulator using ensemble Monte Carlo simulations was studied.
Abstract: We have studied the performance potential of an 80 nm physical gate length MOSFET with GaAs channel and high-k gate insulator using ensemble Monte Carlo simulations. The results show that a such device could deliver a 100–125% increase in the drive current compared to conventional MOSFETs with analogous channel lengths and device structure. This improvement is much higher than the 20–30% drive current increase in similar devices with strained Si channels on virtual SiGe substrates.

2 citations


Journal ArticleDOI
TL;DR: This work indicates that the 70 nm double doped PHEMT is the most suitable design to further increase the device transconductance.

1 citations