다중혈관 관상동맥 환자에서 y-문합을 이용하여 양쪽 내흉동맥만을 사용한 우회술의 조기 성적

An object is to provide a semiconductor device of which a manufacturing process is not complicated and by which cost can be suppressed, by forming a thin film transistor using an oxide semiconductor film typified by zinc oxide, and a manufacturing method thereof. For the semiconductor device, a gate electrode is formed over a substrate; a gate insulating film is formed covering the gate electrode; an oxide semiconductor film is formed over the gate insulating film; and a first conductive film and a second conductive film are formed over the oxide semiconductor film. The oxide semiconductor film has at least a crystallized region in a channel region.

Semiconductor device, and manufacturing method thereof

Damascene copper electroplating for on-chip interconnections, a process that we conceived and developed in the early 1990s, makes it possible to fill submicron trenches and vias with copper without creating a void or a seam and has thus proven superior to other technologies of copper deposition. We discuss here the relationship of additives in the plating bath to superfilling, the phenomenon that results in superconformal coverage, and we present a numerical model which accounts for the experimentally observed profile evolution of the plated metal.

Damascene copper electroplating for chip interconnections

Hydrogen production by semiconductor photocatalysis using abundant sunlight and water is an ideal method to address the globe energy and environment issues. Here, we present a facile synthesis of bromine doped graphitic carbon nitride (g-C 3 N 4 ) photocatalysts for hydrogen evolution with visible light irradiation. Bromine modification is shown to enhance the optical, conductive and photocatalytic properties of g-C 3 N 4 , while still keeping the poly-tri-s(triazine) core structure as the main building blocks of the materials. This modification method can be generally applicable to several precursors of g-C 3 N 4 , including urea, dicyandiamide, ammonium thiocyanide, and thiourea. The optimal sample CNU-Br 0.1 shows more than two times higher H 2 evolution rates than pure CNU sample under visible light irradiation, with high stability during the prolonged photocatalytic operation. Results also found that the photocatalytic O 2 evolution activity of CNU-Br 0.1 was promoted when the sample was subjected to surface kinetic promotion by loading with cobalt oxide as a cocatalyst. This study affords us a feasible modification pathway to rationally design and synthesize g-C 3 N 4 based photocatalysts for a variety of advanced applications, including CO 2 photofixation, organic photosynthesis and environmental remediation.

A facile synthesis of Br-modified g-C3N4 semiconductors for photoredox water splitting

Graphene supported heterogeneous catalysts: An overview

On-chip metal inductors that revolutionized radio frequency electronics in the 1990s suffer from an inherent limitation in their scalability in state-of-the-art radio frequency integrated circuits. This is because the inductance density values for conventional metal inductors, which result from magnetic inductance alone, are limited by the laws of electromagnetic induction. Here, we report inductors made of intercalated graphene that uniquely exploit the relatively large kinetic inductance and high conductivity of the material to achieve both small form-factors and high inductance values, a combination that has proved difficult to attain so far. Our two-turn spiral inductors based on bromine-intercalated multilayer graphene exhibit a 1.5-fold higher inductance density, leading to a one-third area reduction, compared to conventional inductors, while providing undiminished Q-factors of up to 12. This purely material-enabled technique provides an attractive solution to the longstanding scaling problem of on-chip inductors and opens an unconventional path for the development of ultra-compact wireless communication systems.

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On-chip intercalated-graphene inductors for next-generation radio frequency electronics

Room-temperature recrystallization (self-annealing) of electroplated copper (Cu) films is investigated using three kinds of seed/barrier layers with nontexture and (111) texture. The as-plated films have almost the same texture as the seeds. The texture changes during self-annealing depend on the seed texture. The (111) texture of the self-annealing films increases for the film deposited on the nontexture seed layer, but decreases for the film deposited on (111) texture seed layers. For all the plated films, tensile stress increases after self-annealing, which corresponds to the film shrinkage. Recrystallization rate of the Cu film plated on the nontexture seed layer is higher than the one on the (111) texture seed. It is postulated that the reduction of grain boundary energy is the major driving force for film self-annealing and grain growth.

Seed layer dependence of room-temperature recrystallization in electroplated copper films

Electroless NiWP and NiReP films were investigated with the aim of application to barrier and capping layers in interconnect technology. These alloys containing a refractory metal with a high melting point were expected to have the ability to avoid diffusion of Cu into the interlevel dielectric. The composition and resistivity of these films were investigated first in order to know the relation between the composition and its thermal stability. The thermal stability was investigated by measuring the sheet resistance and the cross-sectional observation with field emission scanning electron microscope. Additionally, an electroless Ni alloy deposition on the SiO 2 layer without a sputtered seed layer was also examined by utilizing a self-assembled monolayer (SAM) as an adhesion and catalytic layer. Since an alkaline solution damaged the SiO 2 surface, a two-step process, which consists of a nucleation step performed in an acid electroless deposition bath and a barrier layer formation step carried out in an alkaline bath, is employed in order to fabricate a consistently uniform barrier film on the SAM/SiO 2 surface. It was found that the NiReP films formed on SAM/SiO 2 surfaces were stable up to 400°C, and are feasible for the barrier layer for the Cu interconnect technology.

Electroless Nickel Ternary Alloy Deposition on SiO2 for Application to Diffusion Barrier Layer in Copper Interconnect Technology

A semiconductor integrated circuit device with a capacitor structure having a large capacitance per unit surface is disclosed, wherein a contact hole is formed in an insulator layer, a metal electrode with or without a rugged surface is formed in the contact hole by an ion beam vapor deposition of metal, and a capacitor insulator layer is formed on a surface of the metal electrode The metal electrode is integral with a contact metal The capacitor structure comprises the metal electrode integral with the contact metal and the capacitor insulator layer which are buried in the contact hole The device is improved in planarization, reduction of parasitic resistance, maintenance of capacitance and mass production ability

Method of fabricating a semiconductor device with a capacitor structure having increased capacitance

NiB and NiWB films fabricated by electroless deposition were evaluated aiming for the application to a metal cap in the copper interconnects technology. The content of B and W was varied by adjusting the concentration of components in electroless deposition baths in order to clarify the effect of co-deposited element on thermal stability of the films. The thermal stability was evaluated by Auger electron spectroscope, X-ray diffractometer (XRD) and sheet resistance measurement. By measuring the variation in sheet resistance with annealing temperature, it was confirmed that the NiB films showed good thermal stability up to 450 °C, whereas the NiWB films deteriorated at 300 °C. The effect of co-deposited element was discussed based on the results obtained by XRD as well as that of sheet resistance measurement.

Kazuyoshi Ueno

Papers

On-chip intercalated-graphene inductors for next-generation radio frequency electronics

Seed layer dependence of room-temperature recrystallization in electroplated copper films

Electroless Nickel Ternary Alloy Deposition on SiO2 for Application to Diffusion Barrier Layer in Copper Interconnect Technology

Method of fabricating a semiconductor device with a capacitor structure having increased capacitance

Characterization of chemically-deposited NiB and NiWB thin films as a capping layer for ULSI application