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Kevin Williams

Researcher at Trinity College, Dublin

Publications -  7
Citations -  177

Kevin Williams is an academic researcher from Trinity College, Dublin. The author has contributed to research in topics: Compiler & SIMD. The author has an hindex of 6, co-authored 7 publications receiving 172 citations. Previous affiliations of Kevin Williams include French Institute for Research in Computer Science and Automation.

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Proceedings ArticleDOI

Vapor SIMD: Auto-vectorize once, run everywhere

TL;DR: This work presents a synergistic auto-vectorizing compilation scheme that leverages the optimized intermediate results provided by the first stage across disparate SIMD architectures from different vendors, having distinct characteristics ranging from different vector sizes, memory alignment and access constraints, to special computational idioms.
Proceedings ArticleDOI

Dynamic interpretation for dynamic scripting languages

TL;DR: This paper presents a novel intermediate representation for scripting languages that explicitly encodes types of variables in a flow graph, where each node is a specialized virtual instruction and each edge directs program flow based on control and type changes in the program.
Journal ArticleDOI

An experimental study of sorting and branch prediction

TL;DR: This paper empirically examining the behavior of the branches in all the most common sorting algorithms finds insertion sort to have the fewest branch mispredictions of any comparison-based sorting algorithm, and that bubble and shaker sort operate in a fashion that makes their branches highly unpredictable.
Journal ArticleDOI

Vectorization technology to improve interpreter performance

TL;DR: This work introduces a novel approach for interpreter optimization that reduces instruction dispatch thanks to vectorization technology and extends the split compilation paradigm to interpreters, thus guaranteeing that this approach exhibits almost no overhead at runtime.
Proceedings ArticleDOI

Optimization strategies for a java virtual machine interpreter on the cell broadband engine

TL;DR: This paper investigates some popular interpreter optimizations and introduces new optimizations exploiting the special hardware properties offered by the Cell BE's Synergistic Processing Element (SPE).