This paper summarizes some of the essential aspects of silicon-nanowire growth and of their electrical properties. In the first part, a brief description of the different growth techniques is given, though the general focus of this work is on chemical vapor deposition of silicon nanowires. The advantages and disadvantages of the different catalyst materials for silicon-wire growth are discussed at length. Thereafter, in the second part, three thermodynamic aspects of silicon-wire growth via the vapor–liquid–solid mechanism are presented and discussed. These are the expansion of the base of epitaxially grown Si wires, a stability criterion regarding the surface tension of the catalyst droplet, and the consequences of the Gibbs–Thomson effect for the silicon wire growth velocity. The third part is dedicated to the electrical properties of silicon nanowires. First, different silicon nanowire doping techniques are discussed. Attention is then focused on the diameter dependence of dopant ionization and the influence of interface trap states on the charge carrier density in silicon nanowires. It is concluded by a section on charge carrier mobility and mobility measurements.

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Silicon Nanowires: A Review on Aspects of their Growth and their Electrical Properties

Germanium nanowires with p- and n-dopants were synthesized by chemical vapor deposition and used to construct complementary field effect transistors . Electrical transport and x-ray photoelectron spectroscopy data are correlated to glean the effects of Ge surface chemistry to the electrical characteristics of GeNWs. Large hysteresis due to water molecules strongly bound to GeO2 on GeNWs is revealed. Different oxidation behavior and hysteresis characteristics and opposite band bending due to Fermi level pinning by interface states between Ge and surface oxides are observed for p- and n-type GeNWs. Vacuum annealing above 400C is used to remove surface oxides and eliminate hysteresis in GeNW FETs. High-k dielectric HfO2 films grown on clean GeNW surfaces by atomic layer deposition (ALD) using an alkylamide precursor is effective serving as the first layer of surface passivation. Lastly, the depletion length along the radial direction of nanowires is evaluated. The result suggests that surface effects could be dominant over the bulk properties of small diameter wires.

https://arxiv.org/pdf/cond-mat/0407186.pdf

Surface Chemistry and Electrical Properties of Germanium Nanowires

We have investigated the formation of nanocrystalline Si (nc-Si) in SiH4 plasma using a pulsed-H2 gas supply by very-high-frequency (VHF; 144 MHz) excitation. Nanocrystalline Si is formed in the gas phase of a SiH4 plasma cell by the coalescence of radicals. The particle size of nc-Si is determined by the growth time of nc-Si in the plasma cell. Supplying H2 into SiH4 plasma enhances nucleation of nc-Si. When the H2 gas supply is turned off, nucleated nc-Si particles grow larger in SiH4 plasma. In the next cycle of H2 gas supply, nc-Si particles grown in the previous cycle are pushed out of the cell into the deposition chamber. Using this method, fabrication of nc-Si with a diameter around 8 nm and a narrow spread (±1 nm) of particle size was realized.

Fabrication of Nanocrystalline Silicon with Small Spread of Particle Size by Pulsed Gas Plasma ( Quantum Dot Structures)

Electronic and optical properties of Silicon Nanowire (SiNW) obtained from theoretical studies and experimental approaches have been reviewed. The diameter dependency of bandgap and effective mass of SiNW for various terminations have been presented. Optical absorption of SiNW and nanocone has been compared for different angle of incidences. SiNW shows greater absorption with large range of wavelength and higher range of angle of incidence. Reflectance of SiNW is less than 5% over majority of the spectrum from the UV to near IR region. Thereafter, a brief description of the different growth techniques of SiNW is given. The advantages and disadvantages of the different catalyst materials for SiNW growth are discussed at length. Furthermore, three thermodynamic aspects of SiNW growth via the vapor–liquid–solid mechanism are presented and discussed.

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A review on electronic and optical properties of silicon nanowire and its different growth techniques

Two types of electrostatically actuated tensile stages for in situ electron microscopy mechanical testing of 1-D nanostructures were designed, microfabricated, and tested. Testing was carried out for mechanical characterization of silicon nanowires (SiNWs). The bulk micromachined stages consist of a comb-drive actuator and either a differential capacitive sensor or a clamped-clamped beam force sensor. High-aspect-ratio structures (height/gap = 20) were designed to increase the driving force of the geometrically optimized actuator and the sensitivity of the capacitive sensor. The actuator stiffness is kept low to enable high tensile force to be exerted in the specimen rather than in the suspensions of the comb drive. Individual SiNWs were mounted on the devices by in situ scanning electron microscopy nanomanipulation, and their tensile properties were determined to demonstrate the device capability. The phosphorus-doped SiNWs, which were grown in a bottom-up manner by the vapor-liquid-solid process, show an average Young's modulus of (170.0 ± 2.4) GPa and a tensile strength of at least 4.2 GPa. Top-down electroless chemically etched SiNWs, with their long axis along the [100] direction, show a fracture strength of 5.4 GPa.

In Situ Electron Microscopy Mechanical Testing of Silicon Nanowires Using Electrostatically Actuated Tensile Stages

We report 350 °C as a critical growth temperature for overcoming the aggregation of gold (Au) in the synthesis of high-density silicon nanowires (SiNWs) with controlled diameters in a vapor–liquid–solid (VLS) mechanism by the low-temperature decomposition of Si2H6. Low-temperature growth is considered essential for preserving the initial distribution of Au droplets (8±5 nm) during SiNW nucleation with small (12 nm) and uniform (±5 nm) diameters. Au–Si eutectics increase in size with aggregation at high temperatures, resulting in SiNWs with large and random diameters. The crystal quality, defect formation, and morphology of the wires, grown in the (111) direction, are size dependent.

/pdf/vapor-liquid-solid-growth-of-small-and-uniform-diameter-32h6epolgv.pdf

Vapor–Liquid–Solid Growth of Small- and Uniform-Diameter Silicon Nanowires at Low Temperature from Si2H6

Nominally undoped Ge nanowires were synthesized by a two-step growth method in a low-pressure chemical vapour deposition reactor using a gold nanoparticle-mediated vapour–liquid–solid growth mechanism. The as-grown nanowires were treated by dipping them in an HCl-containing aqueous triiodide solution to remove the gold from the tips and sidewalls of the nanowires. Top-gated field-effect transistors (FETs) fabricated from catalyst-free Ge nanowires (diameters of 20–70 nm and channel lengths of 300–1110 nm) exhibited p-type characteristics as a result of hole accumulation. The gate-modulated hole concentration was calculated to be on the order of 1018 cm−3. On-currents, on/off ratios, transconductances, and field-effect hole mobilities up to 0.29 mA μm−1, 520, 0.44 mS μm−1, and 478 cm2 V−1, respectively, as well as subthreshold slopes of 385 to 580 mV per decade were extracted from these Ge nanowire FETs. These Ge nanowire FETs are expected to exhibit faster intrinsic device speed or gate delay than planar Si p-MOSFETs as the gate length is scaled down to nanometer dimensions. This work provides the first experimental demonstration of p-type enhancement-mode FETs fabricated from undoped and catalyst-free Ge nanowires.

Undoped and catalyst-free germanium nanowires for high-performance p-type enhancement-mode field-effect transistors

We report the growth of germanium nanowires (Ge NWs) with single-step temperature method via vapour-liquid-solid (VLS) mechanism in the low pressure chemical vapour deposition (CVD) reactor at 300 degrees C, 280 degrees C, and 260 degrees C. The catalyst used in our experiment was Au nanoparticles with equivalent thicknesses of 0.1 nm (average diameter approximately 3 nm), 0.3 nm (average diameter approximately 4 nm), 1 nm (average diameter approximately 6 nm), and 3 nm (average diameter approximately 14 nm). The Gibbs-Thomson effect was used to explain our experimental results. The Ge NWs grown at 300 degrees C tend to have tapered structure while the Ge NWs grown at 280 degrees C and 260 degrees C tend to have straight structure. Tapering was caused by the uncatalysed deposition of Ge atoms via CVD mechanism on the sidewalls of nanowire and significantly minimised at lower temperature. We observed that the growth at lower temperature yielded Ge NWs with smaller diameter and also observed that the diameter and length of Ge NWs increases with the size of Au nanoparticles for all growth temperatures. For the same size of Au nanoparticles, Ge NWs tend to be longer with a decrease in temperature. The Ge NWs grown at 260 degrees C from 0.1-nm-thick Au had diameter as small as approximately 3 nm, offering an opportunity to fabricate high-performance p-type ballistic Ge NW transistor, to realise nanowire solar cell with higher efficiency, and also to observe the quantum confinement effect.

Germanium nanowires with 3-nm-diameter prepared by low temperature vapour-liquid-solid chemical vapour deposition.

This paper describes the growth of germanium nanowires (Ge NWs) via vapor–liquid–solid (VLS) mechanism by the low-pressure chemical vapor deposition (CVD) technique. A systematic study of the growth conditions of the Ge NWs has been conducted by varying the size of the Au nanoparticles and the substrate temperature. The tapering of the nanowires has been minimised when the growth temperature is lowered from 300 to 280 °C which also contributes to the decrease in the diameter of the Ge NWs. The growth temperature of 280 °C yields Ge NWs with diameters of less than 5 nm, offering an opportunity for the fabrication of high-performance germanium nanowire field-effect transistors.

https://iopscience.iop.org/article/10.1143/JJAP.50.105002/pdf

Growth of Narrow and Straight Germanium Nanowires by Vapor–Liquid–Solid Chemical Vapor Deposition

We report on a new bottom-up technique for forming silicon nanostructures based on the assembly of nanocrystalline Si (nc-Si) dots by the Langmuir–Blodgett technique. nc-Si dots with a diameter of 10±1 nm fabricated by a very high frequency (VHF) plasma process are dispersed in solvent and functionalized with an appropriate silane coupling agent. After compression at the surface of a Langmuir trough to form a well-organized two-dimensional array, nc-Si dots are transferred onto Si substrates. We have succeeded in forming a well-assembled nc-Si dot array with an area density of 7.33×1011 cm-2. Furthermore, we clarified what happens at the surface of a Langmuir trough based by analyzing surface pressure-area isotherms.

Koichi Usami

Papers

Vapor–Liquid–Solid Growth of Small- and Uniform-Diameter Silicon Nanowires at Low Temperature from Si2H6

Undoped and catalyst-free germanium nanowires for high-performance p-type enhancement-mode field-effect transistors

Germanium nanowires with 3-nm-diameter prepared by low temperature vapour-liquid-solid chemical vapour deposition.

Growth of Narrow and Straight Germanium Nanowires by Vapor–Liquid–Solid Chemical Vapor Deposition

Synthesis of Assembled Nanocrystalline Si Dots Film by the Langmuir-Blodgett Technique