A review of ground-based robotic systems for the characterization of nuclear environments

This paper presents the total dose radiation characteristics of high voltage LDMOS on SIMOX substrate using a total dose radiation-hard 0.8 mu m SOI CMOS process. The radiation performance is characterized by transistor threshold voltage shifts, transistor leakage currents. The experimental results show that the breakdown voltage of the LDMOS is 38 V, the threshold voltage shifts of front channels are less than 300 mV and the back channel threshold voltage are greater than 19 V at 1 Mrad(Si).

Total Dose Radiation Characteristics of High Voltage LDMOS on SIMOX Substrate

In future systems with relatively unreliable and unpredictable energy sources such as harvesters, the system power supply may become non-deterministic. For energy effective operations, Vdd is an important parameter in any meaningful system control mechanism. Reliable and accurate on-chip voltage sensors are therefore indispensible for the power and computation management of such systems. Existing voltage sensing methods are not suitable because they usually require a stable and known reference (voltage, current, time, frequency, etc.), which is difficult to obtain in this environment. This paper describes an autonomous reference-free voltage sensor designed using an asynchronous counter powered by the charge on a capacitor and a small controller. Unlike existing methods, the voltage information is directly generated as a digital code. The sensor, fabricated in the 180 nm technology node, was tested successfully through performing measurements over the voltage range from 1.8 V down to 0.8 V.

Voltage Sensing Using an Asynchronous Charge-to-Digital Converter for Energy-Autonomous Environments

This paper presents Analog Fault Tolerant University of Seville Debugging System (AFTU), a tool to evaluate the Single-Event Effect (SEE) sensitivity of analog/mixed signal microelectronic circuits at transistor level. As analog cells can behave in an unpredictable way when critical areas interact with the particle hitting, there is a need for designers to have a software tool that allows an automatic and exhaustive analysis of Single-Event Effects influence. AFTU takes the test-bench SPECTRE design, emulates radiation conditions and automatically evaluates vulnerabilities using user-defined heuristics. To illustrate the utility of the tool, the SEE sensitivity of a 13-bits Successive Approximation Analog-to-Digital Converter (ADC) has been analysed. This circuit was selected not only because it was designed for space applications, but also due to the fact that a manual SEE sensitivity analysis would be too time-consuming. After a user-defined test campaign, it was detected that some voltage transients were propagated to a node where a parasitic diode was activated, affecting the offset cancelation, and therefore the whole resolution of the ADC. A simple modification of the scheme solved the problem, as it was verified with another automatic SEE sensitivity analysis.

Automatic Single Event Effects Sensitivity Analysis of a 13-Bit Successive Approximation ADC

Total ionizing dose response of fluorine implanted silicon-on-insulator buried oxide

A process for fabricating n-channel JFET/SOS (junction field-effect transistors on silicon-on-sapphire) has been researched. The gate p/sup +/-n junction was obtained by diffusion, and the conductive channel formed by a double ion implantation. Both enhancement and depletion mode transistors were fabricated in different processing conditions. From the results of the Co/sub 60/ /spl gamma/-ray irradiation experiments, we found that the devices had a good total dose radiation hardness. When the total dose was 5 Mrad(Si), their threshold voltages shift was less than 0.1 V. The variation of transconductance and the channel leakage current were also small.

JFET/SOS devices: processing and gamma radiation effects

This paper presents the total dose radiation performance of 0. S^m SOI CMOS devices fabricated with full dose SIMOX technology. The radiation performance is characterized by threshold voltage shifts and leakage currents of transistors and standby currents of ASIC as functions of the total dose up to 500krad(Si) .The experimental results show that the worst case threshold voltage shifts of front channels are less than 320mV for pMOS transistors under off-gate radiation bias at lMrad(Si) and less than 120mV for nMOS transistors under on-gate radiation bias. No significant radiation-induced leakage current is observed in transistors to lMrad(Si). The standby currents of ASIC are less than the specification of 5μA over the total dose range of 500krad(Si).

Total Dose Radiation-Hard 0. SOI CMOS Transistors and ASIC

In this paper, we investigate the effect of silicon surface cleaning prior to oxidation on the reliability of ultra-thin oxides. It is demonstrated that chemical preoxide grown in H/sub 2/SO/sub 4//H/sub 2/O/sub 2/(SPM) solution prior to oxidation provides better oxide integrity than both HF-based solution dipping and preoxide grown in RCA SC1 or SC2 solutions. It is also found that the oxides with SPM preoxide exhibit better hot-carrier immunity than the RCA cleaned oxides.

Dependence of ultra-thin gate oxide reliability on surface cleaning approach

A radiation hardened 256K-bit asynchronous SRAM is presented. It is fabricated by a 0.5-micron, radiation hardened CMOS PDSOI process with 3 layers of metal. It features 800uA stand-by current, 42ns access time, 300K rad(Si) total dose tolerant and 1.5×1011rad (Si)/s dose rate survivability. A 28-pin DIP package is used. The circuit operates with ambient temperature from −55 to +125°C and power supply from 4.5 to 5.5V.

Radiation hardened 256K CMOS SOI SRAM

0.2 mum thin SOS film was modified by solid phase epitaxy using Si implantation. PMOS and NMOS devices and 54HC04 circuits were fabricated by the film. The DC characteristics of CMOS devices were measured. The transient irradiation and total dose irradiation test were put up. It was shown that fabricated integrated circuits have not only quite good electrical characteristics but also excellent transient hardened performance and total dose radiation hardened ability

Liu Zhongli

Papers

JFET/SOS devices: processing and gamma radiation effects

Total Dose Radiation-Hard 0. SOI CMOS Transistors and ASIC

Dependence of ultra-thin gate oxide reliability on surface cleaning approach

Radiation hardened 256K CMOS SOI SRAM

Radiation Hardened Performance of CMOS Devices Fabricated by Using Modified Thin SOS Film