CASP, Concurrent Autonomous chip self-test using Stored test Patterns, is a special kind of self-test where a system tests itself concurrently during normal operation without any downtime visible to the end-user. CASP consists of two ideas: 1. Storage of very thorough test patterns in non-volatile memory; and, 2. Architectural and system-level support for autonomous testing of one or more cores in a multi-core system using stored patterns, concurrently with normal system operation, without bringing down the entire system. CASP enables design of robust systems with built-in features for circuit failure prediction, error detection, self-diagnosis and self-repair. Such systems are necessary to overcome major reliability challenges in scaled-CMOS technologies. Implementation of CASP in the OpenSPARC T1 multi-core processor demonstrates its effectiveness and practicality.

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CASP: concurrent autonomous chip self-test using stored test patterns

A disk drive is disclosed comprising a disk having servo data defining a plurality of servo tracks. The servo data comprises a preamble, and a plurality of slanted line servo bursts recorded at a tilt angle with respect to the preamble. At least one of the slanted line servo bursts comprises a first polarity along a first segment of the slanted line and a second polarity along a second segment of the slanted line. A position error signal (PES) is generated in response to a phase difference when reading the preamble and the slanted line servo bursts.

Disk drive comprising slanted line servo bursts having reverse polarity segments

A disk drive is disclosed comprising a disk having servo data defining a plurality of servo tracks. The servo data comprises a preamble, and a plurality of slanted line servo bursts recorded at a tilt angle with respect to the preamble. The slanted line servo bursts comprises a first plurality of slanted line servo bursts and a second plurality of slanted line servo bursts, wherein the second plurality of slanted line servo bursts are offset radially from the first plurality of slanted line servo bursts. A position error signal (PES) is generated in response to a phase difference when reading the preamble and the slanted line servo bursts.

Disk drive comprising slanted line servo burst sets offset radially

A disk drive is disclosed comprising a disk having servo data defining a plurality of servo tracks. The servo data comprises a preamble comprising a varying length across a radius of the disk, and a plurality of slanted line servo bursts recorded at a tilt angle with respect to the preamble. The tilt angle varies across the radius of the disk commensurate with the varying length of the preamble. A position error signal (PES) is generated in response to a phase difference when reading the preamble and the slanted line servo bursts.

Disk drive comprising slanted line servo bursts having a varying tilt angle

A storage controller includes a device controller and a read data channel. The read data channel includes a decoder for decoding output of a detector, where the detector is for reading data requested from a storage medium by the device controller, and the storage medium has a plurality of tracks of data thereon. When the device controller requests data from a current track of data on the storage device, the detector reads an adjacent track of data, the decoder decodes data from the adjacent track of data, the detector reads data from the current track, and the decoder decodes the data read from the current track, based on the decoded and stored data from the adjacent track of data. A storage system includes a storage medium having a plurality of tracks of data thereon and a storage controller as described above.

Method and system for compensating for adjacent tracks during reading of data

At-speed test of integrated circuits is becoming critical to detect subtle delay defects. Existing structural at-speed test methods are inadequate because they are unable to supply sufficiently-varied functional clock sequences to test complex sequential logic. Moreover, they require tight restrictions on the circuit design. In this paper, we present a new method for at-speed structural test of ASICs, having no tight restrictions on the circuit design. In the present implementation, any complex at-speed functional clock waveform for 16 cycles can be applied. We present DFT structures that can generate high-speed launch-off-capture as well as launch-off-scan clocking without the need to switch a scan enable at-speed. We also describe a method to test asynchronous clock domains simultaneously. Experimental results on fault coverage and hardware measurements for three multi-million gate ASICs demonstrate the feasibility of the proposed approach.

At-Speed Structural Test For High-Performance ASICs

An apparatus, system, and method are disclosed for formatting a timing-based servo pattern on a magnetic tape. A first write head concurrently writes a base number of stripes to a plurality of first stripe patterns with a first and third element and writes the base number of stripes to a plurality of second stripe patterns with a second and fourth element of a first write head in response to at least one first write signal. A second write head concurrently writes an incremental number of stripes to a specified first stripe pattern to form a first incremental stripe pattern with a fifth write element and writes the incremental number of stripes to a specified second stripe pattern to form a second incremental stripe pattern with a sixth write element.

Apparatus, system, and method for timing based servo tape formating

In a tape having separate servo bands of patterns positioned laterally across the tape, the patterns of a separate servo band have at least one differentiating characteristic with respect to patterns of another of the separate servo bands. The differentiating characteristic allows identification of the separate servo bands. For example, the patterns of a separate servo band have differing azimuthal orientations of detectable transitions with respect to another servo band, such as being laterally inverted. In another, variations in the width of gaps of patterns are made with respect to another servo band. In another, variations are made in the number of the detectable transitions of patterns with respect to the patterns of another servo band.

Identification of laterally positioned servo bands employing differentiating characteristics of servo patterns

In magnetic tape having separate longitudinal servo bands of servo information with superimposed data information, the separate servo bands have selected different superimposed data information, to identify the separate servo bands for independent addressability. The servo information comprises non-parallel laterally extending transitions to indicate lateral positioning, and the selected different superimposed data information may comprise a lack thereof in portion(s) of the servo bands. Where the superimposed data information is longitudinal position information of the tape, the selected different superimposed data information may comprise different longitudinal position information of one or more servo band(s). The selected different superimposed data information may comprise a band identifier in the superimposed data information of one or more of the servo bands.

Tape servo information with superimposed data information providing servo band identification

Provided is a read channel, storage drive, and method to process signals read from a storage medium. At least one data channel including an interpolator and equalizer and a servo channel includes an interpolator. A timing recovery function processes a timing error from the interpolator in the servo channel to calculate interpolation timing information used by the interpolator to interpolate a servo channel signal. A path is coupled to the timing recovery function and the interpolator in the at least one data channel to communicate the interpolation timing information to the interpolator in the at least one data channel. The interpolator in the at least one data channel is configured to use the interpolation timing information to interpolate an asynchronous data channel signal.

Mark Allan Taylor

Papers

At-Speed Structural Test For High-Performance ASICs

Apparatus, system, and method for timing based servo tape formating

Identification of laterally positioned servo bands employing differentiating characteristics of servo patterns

Tape servo information with superimposed data information providing servo band identification

Using at least one servo channel to provide timing recovery and timing information to data channels