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Masakatsu Nakai

Researcher at Sony Broadcast & Professional Research Laboratories

Publications -  7
Citations -  413

Masakatsu Nakai is an academic researcher from Sony Broadcast & Professional Research Laboratories. The author has contributed to research in topics: Semiconductor device & Signal. The author has an hindex of 4, co-authored 7 publications receiving 412 citations.

Papers
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Journal ArticleDOI

Dynamic Voltage and Frequency Management for a Low-Power Embedded Microprocessor

TL;DR: In this article, a dynamic voltage and frequency management (DVFM) scheme was introduced in a microprocessor for handheld devices with wideband embedded DRAM, which reduces the power consumption effectively by cooperation of the autonomous clock frequency control and the adaptive supply voltage control.
Journal ArticleDOI

Dynamic voltage and frequency management for a low-power embedded microprocessor

TL;DR: A dynamic voltage and frequency management (DVFM) scheme with leakage power compensation effect is introduced in a microprocessor with 128-bit wideband 64-Mb embedded DRAM, achieving 82% power reduction in personal information management scheduler application and 40% power reduced in MPEG4 movie playback.
Patent

Delay control circuit with internal power supply voltage control

TL;DR: In this paper, the authors proposed a delay-difference-detecting circuit for detecting a phase difference between the delayed pulse signal and the detection pulse signal, and a control circuit for adjusting the magnitude of a power-supply voltage VDD supplied to the target circuit according to the phase difference detected by the delay difference detector.
Patent

Semiconductor apparatus for monitoring critical path delay characteristics of a target circuit

TL;DR: In this paper, a delay signal generation circuit for switching the configuration of delay element arrays based on first configuration information and second configuration information was proposed, and a control circuit for controlling a power source voltage based on the delay information of a delay element array and outputting to the selector a selection signal to select from the first configuration information in a time sharing way.
Patent

Semiconductor device having a power cutoff transistor

TL;DR: In this paper, a semiconductor device with a power cutoff transistor and a first conductivity type was described. Butts of the first and second conductivity types formed to be spaced from each other in the semiconductor substrate.