Showing papers by "Michael Spear published in 2014"
24 Feb 2014
TL;DR: This paper describes the experiences transactionalizing the memcached application through the use of the GCC implementation of the Draft C++ TM Specification and presents experiences and recommendations that it hopes will guide the effort to integrate TM into languages.
Abstract: The addition of transactional memory (TM) support to existing languages provides the opportunity to create new soft- ware from scratch using transactions, and also to simplify or extend legacy code by replacing existing synchronization with language-level transactions. In this paper, we describe our experiences transactionalizing the memcached application through the use of the GCC implementation of the Draft C++ TM Specification. We present experiences and recommendations that we hope will guide the effort to integrate TM into languages, and that may also contribute to the growing collective knowledge about how programmers can begin to exploit TM in existing production-quality software.
42 citations
01 Jan 2014
TL;DR: It is taken that STAMP should not be considered harmful, and the TM research community should embark upon a disciplined effort to produce up-to-date benchmarks, using STAMP as a starting point, and several flaws in STAMP are repaired.
Abstract: The STAMP benchmark suite has not seen any updates in 5 years. During that time, language-level support for Transactional Memory (TM) has arrived, in the form of a draft specification for C++ and compiler support. In addition, there is now commodity hardware support for TM. The properties of STAMP, however, do not always match with the emerging consensus on how hardware and software transactions should be programmed, leading to questions of relevance. We take the position that STAMP should not be considered harmful, and that the TM research community should embark upon a disciplined effort to produce up-to-date benchmarks, using STAMP as a starting point. To this end, we repair several flaws in STAMP and discuss their performance impact.
36 citations
15 Jul 2014
TL;DR: In evaluation on SPARC and x86 architectures, it is found that performance of the lock-free implementation is consistently better than the current state-of-the-art split-ordered list, and that performance for the adaptive wait-free algorithm is compelling across microbenchmark configurations.
Abstract: This paper presents nonblocking hash table algorithms that support resizing in both directions: shrinking and growing. The heart of the table is a freezable set abstraction, which greatly simplifies the task of moving elements among buckets during a resize. Furthermore, the freezable set abstraction makes possible the use of highly optimized implementations of individual buckets, including implementations in which a single flat array is used for each bucket, which improves cache locality.We present lock-free and wait-free variants of our hash table, to include fast adaptive wait-free variants based on the Fastpath/Slowpath methodology. In evaluation on SPARC and x86 architectures, we find that performance of our lock-free implementation is consistently better than the current state-of-the-art split-ordered list, and that performance for the adaptive wait-free algorithm is compelling across microbenchmark configurations.
29 citations
23 Jun 2014
TL;DR: This work introduces a new implementation of condition variables, which uses transactions internally, which can be used from within both transactions and lock-based critical sections, and which is compatible with existing C/C++ interfaces for condition synchronization.
Abstract: Recent microprocessors and compilers have added support for transactional memory (TM). While state-of-the-art TM systems allow the replacement of lock-based critical sections with scalable, optimistic transactions, there is not yet an acceptable mechanism for supporting the use of condition variables in transactions. We introduce a new implementation of condition variables, which uses transactions internally, which can be used from within both transactions and lock-based critical sections, and which is compatible with existing C/C++ interfaces for condition synchronization. By moving most of the mechanism for condition synchronization into user-space, our condition variables have low overhead and permit flexible interfaces that can avoid some of the pitfalls of traditional condition variables. Performance evaluation on an unmodified PARSEC benchmark suite shows equivalent performance to lock-basedcode, and our transactional condition variables also make it possible to replace all locks in PARSEC with transactions.
22 citations
16 Jun 2014
TL;DR: An approach for partitioning OWL Lite datasets is described and a strategy for parallel reasoning about concept instances and role instances on each partition is proposed, which has a polynomial worst case time complexity in the size of the knowledge base.
Abstract: The ability to reason over large scale data and return responsive query results is widely seen as a critical step to achieving the Semantic Web vision. We describe an approach for partitioning OWL Lite datasets and then propose a strategy for parallel reasoning about concept instances and role instances on each partition. The partitions are designed such that each can be reasoned on independently to find answers to each query sub goal, and when the results are unioned together, a complete set of results are found for that sub goal. Our partitioning approach has a polynomial worst case time complexity in the size of the knowledge base. In our current implementation, we partition semantic web datasets and execute reasoning tasks on partitioned data in parallel on independent machines. We implement a master-slave architecture that distributes a given query to the slave processes on different machines. All slaves run in parallel, each performing sound and complete reasoning to execute each sub goal of its query on its own set of partitions. As a final step, master joins the results computed by the slaves. We study the impact of our parallel reasoning approach on query performance and show some promising results on LUBM data.
11 citations
01 Jan 2014
TL;DR: This paper introduces a new condition synchronization mechanism based on the idea of predicates and states that is compatible with hardware, software, and hybrid transactional memories, is simpler to implement than the current state of the art, and does not rely on extensive support from run-time libraries.
Abstract: In this paper, we introduce a new condition synchronization mechanism based on the idea of predicates and states. Our algorithm is compatible with hardware, software, and hybrid transactional memories, is simpler to implement than the current state of the art, and does not rely on extensive support from run-time libraries.
2 citations