M
Minesh Patel
Researcher at ETH Zurich
Publications - 42
Citations - 1612
Minesh Patel is an academic researcher from ETH Zurich. The author has contributed to research in topics: Dram & Memory controller. The author has an hindex of 16, co-authored 42 publications receiving 923 citations. Previous affiliations of Minesh Patel include Sardar Vallabhbhai National Institute of Technology, Surat & Carnegie Mellon University.
Papers
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Journal ArticleDOI
LazyPIM: An Efficient Cache Coherence Mechanism for Processing-in-Memory
Amirali Boroumand,Saugata Ghose,Minesh Patel,Hasan Hassan,Brandon Lucia,Kevin Hsieh,Malladi Krishna T,Zheng Hongzhong,Onur Mutlu +8 more
TL;DR: It is found that LazyPIM improves average performance across a range of PIM applications by 49.1 percent over the best prior approach, coming within 5.5 percent of an ideal PIM mechanism.
Proceedings ArticleDOI
The Reach Profiler (REAPER): Enabling the Mitigation of DRAM Retention Failures via Profiling at Aggressive Conditions
TL;DR: In this article, the authors propose reach profiling, a new methodology for retention failure profiling based on the key observation that an overwhelming majority of failing DRAM cells at a target refresh interval fail more reliably at both longer refresh intervals and higher temperatures.
Proceedings ArticleDOI
The DRAM Latency PUF: Quickly Evaluating Physical Unclonable Functions by Exploiting the Latency-Reliability Tradeoff in Modern Commodity DRAM Devices
TL;DR: The DRAM latency PUF is introduced, a new class of fast, reliable DRAM PUFs that satisfy runtime-accessible PUF requirements and are quickly generated irrespective of operating temperature using a real system with no additional hardware modications.
Proceedings ArticleDOI
D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput
TL;DR: D-RanGe is a methodology for extracting true random numbers from commodity DRAM devices with high throughput and low latency by deliberately violating the read access timing parameters and is evaluated using the commonly-used NIST statistical test suite for randomness.
Proceedings ArticleDOI
CoNDA: efficient cache coherence support for near-data accelerators
Amirali Boroumand,Zheng Hongzhong,Onur Mutlu,Saugata Ghose,Minesh Patel,Hasan Hassan,Brandon Lucia,Rachata Ausavarungnirun,Kevin Hsieh,Nastaran Hajinazar,Malladi Krishna T +10 more
TL;DR: CoNDA is proposed, a coherence mechanism that lets an NDA optimistically execute an Nda kernel, under the assumption that the NDA has all necessary coherence permissions, and allows CoNDA to gather information on the memory accesses performed by the Nda and by the rest of the system.