International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について －

This review covers research on the topic of mixed criticality systems that has been published since Vestal’s 2007 paper. It covers the period up to and including December 2015. The review is organised into the following topics: introduction and motivation, models, single processor analysis (including job-based, hard and soft tasks, fixed priority and EDF scheduling, shared resources and static and synchronous scheduling), multiprocessor analysis, related topics, realistic models, formal treatments, and systems issues. An appendix lists funded projects in the area of mixed criticality.

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Mixed Criticality Systems - A Review

From the Publisher:
Real-Time Systems is both a valuable reference for professionals and an advanced text for Computer Science and Computer Engineering students. 

Real world real-time applications based on research and practice

State-of-the-art algorithms and methods for validation

Methods for end-to-end scheduling and resource management

More than 100 illustrations to enhance understanding

Comprehensive treatment of the technology known as RMA (rate-monotonic analysis) methods

A supplemental Companion Website www.prenhall.com/liu

http://user.it.uu.se/~yi/courses/rts/dvp-rts-08/notes/Course-INFO.pdf

Real-Time Systems

The Art of Computer Systems Performance Analysis (Techniques for Experimental Design, Measurement, Simulation, and Modeling)

This survey covers research into mixed criticality systems that has been published since Vestal’s seminal paper in 2007, up until the end of 2016. The survey is organised along the lines of the major research areas within this topic. These include single processor analysis (including fixed priority and Earliest Deadline First (EDF) scheduling, shared resources, and static and synchronous scheduling), multiprocessor analysis, realistic models, and systems issues. The survey also explores the relationship between research into mixed criticality systems and other topics such as hard and soft time constraints, fault tolerant scheduling, hierarchical scheduling, cyber physical systems, probabilistic real-time systems, and industrial safety standards.

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A Survey of Research into Mixed Criticality Systems

With progressing CMOS technology miniaturization, the leakage power consumption starts to dominate the dynamic power consumption The recent technology trends have equipped the modern embedded processors with the several sleep states and reduced their overhead (energy/time) of the sleep transition The dynamic voltage frequency scaling (DVFS) potential to save energy is diminishing due to efficient (low overhead) sleep states and increased static (leakage) power consumption The state-of-the-art research on static power reduction at system level is based on assumptions that cannot easily be integrated into practical systems We propose a novel enhanced race-to-halt approach (ERTH) to reduce the overall system energy consumption The exhaustive simulations demonstrate the effectiveness of our approach showing an improvement of up to 8 % over an existing work

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Enhanced Race-To-Halt: A Leakage-Aware Energy Management Approach for Dynamic Priority Systems

COTS-based multicores are now the preferred choice for hosting embedded applications owing to their immense computational capabilities, small form factor and low power consumption. Many of these embedded applications have real-time requirements and real-time system designers must be able assess them for their predictability and provide guarantees (at design time) that they deliver the correct functional behavior within predefined time bounds. However, the underlying architecture of commercially available multicores is extremely complex and non-amenable to straight-forward timing analysis. In this paper, we highlight the architectural features leading to temporal unpredictability, which mainly involve shared hardware resources, such as buses, caches, and memories. We explore some of the existing work in timing analysis with respect to these features, identify their limitations, and present some unaddressed issues that must be dealt with to ensure safe deployment of real-time systems.

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Identifying the sources of unpredictability in COTS-based multicore systems

Modern multicore processors for the embedded market are often heterogeneous in nature. One feature often available are multiple sleep states with varying transition cost for entering and leaving said sleep states. This research effort explores the energy efficient task-mapping on such a heterogeneous multicore platform to reduce overall energy consumption of the system. This is performed in the context of a partitioned scheduling approach and a realistic power model, which improves over some of the simplifying assumptions often made in the state-of-the-art. The developed heuristic consists of two phases, in the first phase, tasks are allocated to minimise their active energy consumption, while the second phase trades off a higher active energy consumption for an increased ability to exploit savings through more efficient sleep states. Extensive simulations demonstrate the effectiveness of the approach.

/pdf/energy-aware-partitioning-of-tasks-onto-a-heterogeneous-319a0gsq5c.pdf

Energy-aware partitioning of tasks onto a heterogeneous multi-core platform

Real-time systems demand guaranteed and predictable run-time behaviour in order to ensure that no task has missed its deadline. Over the years we are witnessing an ever increasing demand for functionality enhancements in the embedded real-time systems. Along with the functionalities, the design itself grows more complex. Posed constraints, such as energy consumption, time, and space bounds, also require attention and proper handling. Additionally, efficient scheduling algorithms, as proven through analyses and simulations, often impose requirements that have significant run-time cost, specially in the context of multi-core systems. In order to further investigate the behaviour of such systems to quantify and compare these overheads involved, we have developed the SPARTS, a simulator of a generic embedded realtime device. The tasks in the simulator are described by externally visible parameters (e.g. minimum inter-arrival, sporadicity, WCET, BCET, etc.), rather than the code of the tasks. While our current implementation is primarily focused on our immediate needs in the area of power-aware scheduling, it is designed to be extensible to accommodate different task properties, scheduling algorithms and/or hardware models for the application in wide variety of simulations. The source code of the SPARTS is available for download at [1].

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SPARTS: Simulator for Power Aware and Real-Time Systems

Heterogeneous multicore platforms are becoming an interesting alternative for embedded computing systems with limited power supply as they can execute specific tasks in an efficient manner. Nonetheless, one of the main challenges of such platforms consists of optimising the energy consumption in the presence of temporal constraints. This paper addresses the problem of task-to-core allocation onto heterogeneous multicore platforms such that the overall energy consumption of the system is minimised. To this end, we propose a two-phase approach that considers both dynamic and leakage energy consumption: (i) the first phase allocates tasks to the cores such that the dynamic energy consumption is reduced; (ii) the second phase refines the allocation performed in the first phase in order to achieve better sleep states by trading off the dynamic energy consumption with the reduction in leakage energy consumption. This hybrid approach considers core frequency set-points, tasks energy consumption and sleep states of the cores to reduce the energy consumption of the system. Major value has been placed on a realistic power model which increases the practical relevance of the proposed approach. Finally, extensive simulations have been carried out to demonstrate the effectiveness of the proposed algorithm. In the best-case, savings up to $$18\,\%$$18% of energy are reached over the first fit algorithm, which has shown, in previous works, to perform better than other bin-packing heuristics for the target heterogeneous multicore platform.

Muhammad Ali Awan

Papers

Enhanced Race-To-Halt: A Leakage-Aware Energy Management Approach for Dynamic Priority Systems

Identifying the sources of unpredictability in COTS-based multicore systems

Energy-aware partitioning of tasks onto a heterogeneous multi-core platform

SPARTS: Simulator for Power Aware and Real-Time Systems

Energy-aware task mapping onto heterogeneous platforms using DVFS and sleep states