To overcome scaling issues such as controlling gate leakage, drain induced barrier lowering, higher subthreshold conduction, polysilicon gate depletion, and other short channel effects various engineering proposed. The gate dielectric, metal work function, and device structural engineering enabled the semiconductor industry to make a transition from the conventional planar MOSFET towards a revolutionary 3D tri-gate structure called FinFET. FinFET is one of the fundamental invention in the semiconductor industry, which replaced the planar CMOS technology around 22 nm technology. By following Moore’s law, it accelerated the scaling to 7 nm, but at 5 nm, in the same way, GAAFET replaced FinFET due to technological hurdles. Nanosheet, which is one type of GAAFET are in the recent trend. But researchers are trying to explore the possibilities to continue the miniaturization beyond 3 nm by combining the effect of non-silicon channel material such as Ge, InGaAs, or 2D materials with nanosheet, which will improve the functionality of the device while going down in the technology node. In this survey, an attempt has been made for the structure present till 7 nm process. Also, a few new proposals in research to take the scaling up to 3 nm and beyond are included. The future innovations may put an intercept on the slowing down of Moore’s law, and bring the miniaturization back in the track.

A Journey from Bulk MOSFET to 3 nm and Beyond

In this paper, an 18nm dopingless asymmetrical junctionless (AJ) double gate (DG) MOSFET has been designed for suppressed short channel effects (SCEs) for low power applications. A desired ON and OFF state current ratio with subthreshold performance parameters under limit, is the major focus of the proposed transistor. Different sensitivity parameters of dopingless AJ DG MOSFET such as drain extension, length of gate overlapping and oxide thickness are compared with the AJ DG MOSFET with doped channel region. The ON-state current obtained is 3.80 x $${10}^{-6 }$$
 A/µm with reduced OFF-state leakage current up to1.37 x $${10}^{-17 }$$
 A/µm. The subthreshold slope (SS) and drain induced barrier lowering (DIBL) of the device obtained are 59.5 mV/decade and 10.5 mV/V respectively. Temperature analysis of proposed device at various temperature such as 250 K,300 K, 350 and 400 K shows a small variation in OFF-state current (< 15 %). Additionally, a p-channel AJ DG MOSFET along with n-channel AJ DG MOSFET are designed and their performance is evaluated for CMOS inverter circuit and 6T SRAM cell. All design and analysis have been done with a 2D/3D Visual TCAD device simulator.

/pdf/18nm-n-channel-and-p-channel-dopingless-asymmetrical-2rb3h5q7ft.pdf

18nm n-channel and p-channel Dopingless Asymmetrical Junctionless DG-MOSFET: Low Power CMOS Based Digital and Memory Applications

Effect of Mole fraction and Fin Material on Performance Parameter of 14 nm Heterojunction Si1-xGex FinFET and Application as an Inverter

In this paper, we design, simulate and analyze FinFET with different materials, corresponding variation in ID VS VGS, transconductance, subthreshold slope. There is an increase in ON current on using a high-k dielectric material and subsequently an improvement in other parameters like subthreshold slope and transconductance.

Simulation and Drain Current Performance analysis of High-K Gate Dielectric FinFET

Implementation of Low Power Inverter using Si1-xGex Pocket N & P-Channel Junction-Less Double Gate TFET

CMOS technology is one of the most frequently used technologies in the semiconductor industry as it can be successfully integrated with ICs. Every two years the number of MOS transistors doubles because the size of the MOSFET is reduced. Reducing the size of the MOSFET reduces the size of the channel length which causes short channel effects and it increases the leakage current. To reduce the short channel effects new designs and technologies are implemented. Double gate MOSFET design has shown improvement in performance as amplifiers over a single MOSFET. Silicon-based MOSFET design can be used in a harsh environment. It has been used in various applications such as in detecting biomolecules. The increase in number of gates increases the current drive capability of transistors. GAA MOSFET is an example of a quadruple gate around the four sides of channel that increases gate control over the channel region. It also increases effective channel width that improves drain current and reduces leakage current keeping short channel effects under limit. Junctionless MOSFET operates faster and uses less power with increase in ON-state current leading to a good value of ION/IOFF ratio. In this paper, several gate and channel engineered MOSFET structures are analyzed and compared for sub 45 nm technology node. A comparison among different MOSFET structures has been made for subthreshold performance parameters in terms of IOFF, subthreshold slope and DIBL values. The analog/RF performance is analyzed for transconductance, effective transistor capacitances, stability factor and critical frequency. The paper also covers different applications of advance MOSFET structures in analog/digital or IoT/ biomedical applications.

A review on performance comparison of advanced MOSFET structures below 45 nm technology node

The Complementary Metal-Oxide Semiconductor (CMOS) technology has evolved to a great extent and is being used for different applications like environmental, biomedical, radiofrequency and switching, etc. Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) based biosensors are used for detecting various enzymes, molecules, pathogens and antigens efficiently with a less time-consuming process involved in comparison to other options. Early-stage detection of disease is easily possible using Field-Effect Transistor (FET) based biosensors. In this paper, a steep subthreshold heavily doped n+ pocket asymmetrical junctionless MOSFET is designed for biomedical applications by introducing a nanogap cavity region at the gate-oxide interface. The nanogap cavity region is introduced in such a manner that it is sensitive to variation in biomolecules present in the cavity region. The analysis is based on dielectric modulation or changes due to variation in the bio-molecules present in the environment or the human body. The analysis of proposed asymmetrical junctionless MOSFET with nanogap cavity region is carried out with different dielectric materials and variations in cavity length and height inside the gate–oxide interface. Further, this device also showed significant variation for changes in different introduced charged particles or region materials, as simulated through a 2D visual Technology Computer-Aided Design (TCAD) device simulator.

https://www.mdpi.com/2076-3417/10/7/2499/pdf

Design and Analysis of Heavily Doped n+ Pocket Asymmetrical Junction-Less Double Gate MOSFET for Biomedical Applications

Analytical Model of Dopingless Asymmetrical Junctionless Double Gate MOSFET

The research and use of FET for biomedical application has increased and found its usage as a biosensor for the detection of biomolecules. Detecting various diseases like pathogens, cancer, viral diseases has been difficult and time taking. Using FET as a biosensor for identifying different biomolecules has been a less costly and time-saving process and can also be used in detecting diseases at an early stage. Mass production of FET's is very cheap as compared to the different other devices like nano-mechanic, piezoelectric, optical etc. which are very expensive. In this paper, different device structures are shown that are used as a biosensor to detect biomolecules of different dielectric constant.

Namrata Mendiratta

Papers

A review on performance comparison of advanced MOSFET structures below 45 nm technology node

Design and Analysis of Heavily Doped n+ Pocket Asymmetrical Junction-Less Double Gate MOSFET for Biomedical Applications

18nm n-channel and p-channel Dopingless Asymmetrical Junctionless DG-MOSFET: Low Power CMOS Based Digital and Memory Applications

Analytical Model of Dopingless Asymmetrical Junctionless Double Gate MOSFET

DG MOSFET for Bio-Sensing Applications: A Review