Showing papers in "Silicon in 2022"

A Comprehensive Review of Synthesis, Applications and Future Prospects for Silica Nanoparticles (SNPs)

Abstract: Silica nanoparticles (SNPs) have shown great applicability potential in a number of fields like chemical, biomedical, biotechnology, agriculture, environmental remediation and even wastewater purification. With remarkably instinctive properties like mesoporous structure, high surface area, tunable pore size/diameter, biocompatibility, modifiability and polymeric hybridizability, the SNPs are growing in their applicable potential even further. These particles are shown to be non-toxic in nature, hence safe to be used in biomedical research. Moreover, the molecular mobilizability onto the internal and external surface of the particles makes them excellent carriers for biotic and non-biotic compounds. In this respect, the present study comprehensively reviews the most important and recent applications of SNPs in a number of fields along with synthetic approaches. Moreover, despite versatile contributions, the applicable potential of SNPs is still a tip of the iceberg waiting to be exploited more, hence, the last section of the review presents the future prospects containing only few of the many gaps/research extensions regarding SNPs that need to be addressed in future work.

Circuit Analysis and Optimization of GAA Nanowire FET Towards Low Power and High Switching

Abstract: The main aim of this work is to study the effect of symmetric and asymmetric spacer length variations towards source and drain on n-channel SOI JL vertically stacked (VS) nanowire (NW) FET at 10 nm gate length (LG). Spacer length is proved to be one of the stringent metrics in deciding device performance along with width, height and aspect ratio (AR). The physical variants in this work are symmetric spacer length (LSD), source side spacer length (LS) and drain side spacer length (LD). The simulation results give the highest ION/IOFF ratio with LD variation compared to LS and LSD, whereas latter two variations have similar effect on ION/IOFF ratio. At 25 nm (2.5 × LG) of LD, the device gives appreciable ON current with the highest ION/IOFF ratio (2.19 × 108) with optimum subthreshold slope (SS) and ensures low power and high switching drivability. Moreover, it is noticed that among optimal values of LS and LD, the device ION/IOFF ratio has an improvement of 22.69% as compared to other variations. Moreover, the effect of various spacer dielectrics on optimized device is also investigated. Finally, the CMOS inverter circuit analysis is performed on the optimized symmetric and asymmetric spacer lengths.