Memristive devices are electrical resistance switches that can retain a state of internal resistance based on the history of applied voltage and current. These devices can store and process information, and offer several key performance characteristics that exceed conventional integrated circuit technology. An important class of memristive devices are two-terminal resistance switches based on ionic motion, which are built from a simple conductor/insulator/conductor thin-film stack. These devices were originally conceived in the late 1960s and recent progress has led to fast, low-energy, high-endurance devices that can be scaled down to less than 10 nm and stacked in three dimensions. However, the underlying device mechanisms remain unclear, which is a significant barrier to their widespread application. Here, we review recent progress in the development and understanding of memristive devices. We also examine the performance requirements for computing with memristive devices and detail how the outstanding challenges could be met.

Memristive devices for computing

IN two previous notes1, Prof. Max Born and I have shown that one can obtain a theory of superconductivity by taking account of the fact that the interaction of the electrons with the ionic lattice is appreciable only near the boundaries of Brillouin zones, and particularly strong near the corners of these. This leads to the criterion that the metal should be superconductive if a set of corners of a Brillouin zone is lying very near the Fermi surface, considered as a sphere, which limits the region in the momentum space completely filled with electrons.

On the theory of superconductivity

We examine the current performance and future demands of interconnects to and on silicon chips. We compare electrical and optical interconnects and project the requirements for optoelectronic and optical devices if optics is to solve the major problems of interconnects for future high-performance silicon chips. Optics has potential benefits in interconnect density, energy, and timing. The necessity of low interconnect energy imposes low limits especially on the energy of the optical output devices, with a ~ 10 fJ/bit device energy target emerging. Some optical modulators and radical laser approaches may meet this requirement. Low (e.g., a few femtofarads or less) photodetector capacitance is important. Very compact wavelength splitters are essential for connecting the information to fibers. Dense waveguides are necessary on-chip or on boards for guided wave optical approaches, especially if very high clock rates or dense wavelength-division multiplexing (WDM) is to be avoided. Free-space optics potentially can handle the necessary bandwidths even without fast clocks or WDM. With such technology, however, optics may enable the continued scaling of interconnect capacity required by future chips.

Device Requirements for Optical Interconnects to Silicon Chips

Recent research results pertaining to InN, GaN and AlN are reviewed, focusing on the different growth techniques of Group III-nitride crystals and epitaxial films, heterostructures and devices. The chemical and thermal stability of epitaxial nitride films is discussed in relation to the problems of deposition processes and the advantages for applications in high-power and high-temperature devices. The development of growth methods like metalorganic chemical vapour deposition and plasma-induced molecular beam epitaxy has resulted in remarkable improvements in the structural, optical and electrical properties. New developments in precursor chemistry, plasma-based nitrogen sources, substrates, the growth of nucleation layers and selective growth are covered. Deposition conditions and methods used to grow alloys for optical bandgap and lattice engineering are introduced. The review is concluded with a description of recent Group III-nitride semiconductor devices such as bright blue and white light-emitting diodes, the first blue-emitting laser, high-power transistors, and a discussion of further applications in surface acoustic wave devices and sensors.

https://iopscience.iop.org/article/10.1088/0022-3727/31/20/001/pdf

Growth and applications of Group III-nitrides

Semiconductor nanowires represent an important class of nanostructure building block for photovoltaics as well as direct solar-to-fuel application because of their high surface area, tunable bandgap and efficient charge transport and collection. In this talk, I will highlight several recent examples in this lab using semiconductor nanowires and their heterostructures for the purpose of solar energy harvesting. In addition, we have also discovered that the thermoconductivity of the silicon nanowires can be significantly reduced due to phonon scattering, pointing to a very promising approach to design better thermoelectrical materials. It is important to note that the engines that generate most of the world's power typically operate at only 30–40 per cent efficiency, releasing roughly 15 terawatts of heat to the environment. If this “wasted heat” could be recycled, the impact globally would be enormous. Our silicon nanowire thermoelectric technology could have a significant impact in alternative energy generation.

Semiconductor nanowires for energy conversion.

Coherent InAs islands separated by GaAs spacer layers are shown to exhibit self-organized growth along the vertical (i.e., growth) direction. The driving force for such vertically self-organized growth is shown to be the interacting strain fields induced by the islands which give rise to a preferred direction for In migration. A model analysis accounting for the mechanochemical surface diffusion gives an island average size and average separation dependent characteristic spacer layer thickness ${z}_{0}$ below which a vertically self-organized growth occurs.

Vertically Self-Organized InAs Quantum Box Islands on GaAs(100)

We present a "nanoparticle-in-alloy" material approach with silicide and germanide fillers leading to a potential 5-fold increase in the thermoelectric figure of merit of SiGe alloys at room temperature and 2.5 times increase at 900 K. Strong reductions in computed thermal conductivity are obtained for 17 different types of silicide nanoparticles. We predict the existence of an optimal nanoparticle size that minimizes the nanocomposite's thermal conductivity. This thermal conductivity reduction is much stronger and strikingly less sensitive to nanoparticle size for an alloy matrix than for a single crystal one. At the same time, nanoparticles do not negatively affect the electronic conduction properties of the alloy. The proposed material can be monolithically integrated into Si technology, enabling an unprecedented potential for micro refrigeration on a chip. High figure-of-merit at high temperatures (ZT approximately 1.7 at 900 K) opens up new opportunities for thermoelectric power generation and waste heat recovery at large scale.

https://pubs.acs.org/doi/pdf/10.1021/nl101467h

Nanoparticle in Alloy Approach to Efficient Thermoelectrics: Silicides in SiGe

We demonstrate an effective method for depositing smooth silver (Ag) films on SiO2/Si(100) substrates using a thin seed layer of evaporated germanium (Ge). The deposited Ag films exhibit smaller root-mean-square surface roughness, narrower peak-to-valley surface topological height distribution, smaller grain-size distribution, and smaller sheet resistance in comparison to those of Ag films directly deposited on SiO2/Si(100) substrates. Optically thin (∼10−20 nm) Ag films deposited with ∼1−2 nm Ge nucleation layers show more than an order of magnitude improvement in the surface roughness. The presence of the thin layer of Ge changes the growth kinetics (nucleation and evolution) of the electron-beam-evaporated Ag, leading to Ag films with smooth surface morphology and high electrical conductivity. The demonstrated Ag thin films are very promising for large-scale applications as molecular anchors, optical metamaterials, plasmonic devices, and several areas of nanophotonics.

/pdf/ultrasmooth-silver-thin-films-deposited-with-a-germanium-4c8e7mp66e.pdf

Ultrasmooth silver thin films deposited with a germanium nucleation layer.

The authors report the experimental observation of a critical diameter (CD) of III-V compound semiconductor epitaxial nanowires (NWs) grown on lattice-mismatched substrates using Au-catalyzed vapor-liquid-solid growth. The CD is found to be inversely proportional to the lattice mismatch. NWs with well-aligned orientation are synthesized with catalysts smaller than the CD. Well-aligned InP NWs grown on a Si substrate exhibit a record low photoluminescence linewidth (5.1meV) and a large blueshift (173meV) from the InP band gap energy due to quantization. Well-aligned InAs NWs grown on a Si substrate are also demonstrated.

Critical diameter for III-V nanowires grown on lattice-mismatched substrates

The size evolution of molecular beam epitaxy‐grown strained InAs three‐dimensional (3D) islands on GaAs(001) is examined using in situ ultrahigh vacuum atomic force microscopy. Remarkably, just after the initiation of well‐formed 3D islands at ∼1.57 ML InAs deposition, the lateral size dispersion and average value are found to first increase drastically with the smallest amount (∼0.05 ML) of additional InAs deposition and then decrease and saturate, indicating the onset of a natural tendency for size equalization, including through loss of material from the initially formed largest islands. These observations are found to be consistent with the previously suggested island‐separation dependent influence of the evolving island‐induced substrate strain fields on the adatom migration and incorporation/detachment kinetics that control the evolution of the islands.

Nobuhiko P. Kobayashi

Papers

Vertically Self-Organized InAs Quantum Box Islands on GaAs(100)

Nanoparticle in Alloy Approach to Efficient Thermoelectrics: Silicides in SiGe

Ultrasmooth silver thin films deposited with a germanium nucleation layer.

Critical diameter for III-V nanowires grown on lattice-mismatched substrates

In situ, atomic force microscope studies of the evolution of InAs three‐dimensional islands on GaAs(001)