The so-called Boltzmann tyranny defines the fundamental thermionic limit of the subthreshold slope of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV dec-1 at room temperature and therefore precludes lowering of the supply voltage and overall power consumption 1,2 . Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier 3 . Meanwhile, two-dimensional semiconductors such as atomically thin transition-metal dichalcogenides, due to their low dielectric constant and ease of integration into a junctionless transistor topology, offer enhanced electrostatic control of the channel 4-12 . Here, we combine these two advantages and demonstrate a molybdenum disulfide (MoS2) two-dimensional steep-slope transistor with a ferroelectric hafnium zirconium oxide layer in the gate dielectric stack. This device exhibits excellent performance in both on and off states, with a maximum drain current of 510 μA μm-1 and a sub-thermionic subthreshold slope, and is essentially hysteresis-free. Negative differential resistance was observed at room temperature in the MoS2 negative-capacitance FETs as the result of negative capacitance due to the negative drain-induced barrier lowering. A high on-current-induced self-heating effect was also observed and studied.

Steep-slope hysteresis-free negative capacitance MoS 2 transistors

Ferroelectricity in HfO2-based materials, especially Hf0.5Zr0.5O2 (HZO), is today one of the most attractive topics because of its wide range of applications in ferroelectric random-access memory, ferroelectric field-effect transistors, ferroelectric tunneling junctions, steep-slope devices, and synaptic devices. The main reason for this increasing interest is that, when compared with conventional ferroelectric materials, HZO is compatible with complementary metal–oxide–semiconductor flow [even back-end of the line thermal budget] and can exhibit robust ferroelectricity even at extremely thin (< 10 nm) thicknesses. In this report, recent advances in the ferroelectric properties of HZO thin films since the first report in 2011, including doping effects, mechanical stress effects, interface effects, and ferroelectric film thickness effects, are comprehensively reviewed.

Ferroelectric Hf 0.5 Zr 0.5 O 2 Thin Films: A Review of Recent Advances

The so-called Boltzmann Tyranny defines the fundamental thermionic limit of the subthreshold slope (SS) of a metal-oxide-semiconductor field-effect transistor (MOSFET) at 60 mV/dec at room temperature and, therefore, precludes the lowering of the supply voltage and the overall power consumption. Adding a ferroelectric negative capacitor to the gate stack of a MOSFET may offer a promising solution to bypassing this fundamental barrier. Meanwhile, two-dimensional (2D) semiconductors, such as atomically thin transition metal dichalcogenides (TMDs) due to their low dielectric constant, and ease of integration in a junctionless transistor topology, offer enhanced electrostatic control of the channel. Here, we combine these two advantages and demonstrate for the first time a molybdenum disulfide (MoS2) 2D steep slope transistor with a ferroelectric hafnium zirconium oxide layer (HZO) in the gate dielectric stack. This device exhibits excellent performance in both on- and off-states, with maximum drain current of 510 {\mu}A/{\mu}m, sub-thermionic subthreshold slope and is essentially hysteresis-free. Negative differential resistance (NDR) was observed at room temperature in the MoS2 negative capacitance field-effect-transistors (NC-FETs) as the result of negative capacitance due to the negative drain-induced-barrier-lowering (DIBL). High on-current induced self-heating effect was also observed and studied.

Steep-slope Hysteresis-free Negative Capacitance MoS2 Transistors

The negative-capacitance field-effect transistor(NC-FET) has attracted tremendous research efforts. However, the lack of a clear physical picture and design rule for this device has led to numerous invalid fabrications. In this work, we address this issue based on an unexpectedly concise and insightful analytical formulation of the minimum hysteresis-free subthreshold swing (SS), together with several important conclusions. Firstly, well-designed MOSFETs that have low trap density, low doping in the channel, and excellent electrostatic integrity, receive very limited benefit from NC in terms of achieving subthermionic SS. Secondly, quantum-capacitance is the limiting factor for NC-FETs to achieve hysteresis-free subthermionic SS, and FETs that can operate in the quantum-capacitance limit are desired platforms for NC-FET construction. Finally, a practical role of NC in FETs is to save the subthreshold and overdrive voltage losses. Our analysis and findings are intended to steer the NC-FET research in the right direction.

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Is negative capacitance FET a steep-slope logic switch?

In recent years, the negative capacitance effect in ferroelectric (FE) materials has attracted significant attention from many researchers around the world. The negative capacitance effect promises to reduce the voltage requirement in conventional complementary metal–oxide–semiconductor transistors below what is otherwise believed to be the Boltzmann limit. In this paper, our objective is to discuss the fundamental underpinning of the negative capacitance effect and describe how it can be utilized for transistors. We shall start with a thermodynamic perspective to understand where the reduction in energy dissipation comes from. We then proceed to derive the S curve in an FE material from fundamental principles. The central result of this paper is to associate the negative slope region in the S curve to a physically definable configuration of dipoles in the crystal structure. The design of a negative capacitance transistor is essentially an exercise of stabilizing the FE in the negative slope region of the S curve using the semiconductor capacitance as a series capacitor.

Negative Capacitance Transistors

We have experimentally investigated the polarization-limited operation speed of Negative Capacitance FET (NCFET) through direct measurement of negative capacitance in transient behavior of ferroelectric HfO 2 capacitor and physics-based modeling, for the first time. Systematic analysis of frequency dependence and transient characteristics of ferroelectric HfO 2 capacitor enabled accurate parameter extraction. With extracted parameters, our newly developed time-dependent NCFET model provided the evidence that NCFET can operate at >MHz, which is suitable for ultralow power IoT application.

Experimental study on polarization-limited operation speed of negative capacitance FET with ferroelectric HfO 2

We have proposed and investigated a super steep subthreshold slope transistor by introducing negative capacitance of a ferroelectric HfO2 gate insulator to a vertical tunnel FET for energy efficient computing. The channel structure and gate insulator are systematically designed to maximize the $I_{{\rm{on}}}/ I_{{\rm{off}}}$ ratio. The simulation study reveals that the electric field at the tunnel junction can be effectively enhanced by potential amplification due to the negative capacitance. The enhanced electric field increases the band-to-band tunneling rate and $I_{{\rm{on}}}/ I_{{\rm{off}}}$ ratio, which results in 10× higher energy efficiency than in tunnel FET.

Negative Capacitance for Boosting Tunnel FET performance

We have experimentally observed the negative-capacitance transient effect in a ferroelectric HfZrO2 (FE-HZO) capacitor and developed an equivalent circuit model based on the Landau–Khalatnikov (LK) theory. By considering multiple domains (MD) and domain interaction, an MD-LK model precisely reproduced the experimental dynamic characteristics in an FE-HZO capacitor with the various input voltage amplitude and external resistance. The MD-LK model was successfully validated as a dynamic model for FE-HZO capacitor. The MD-LK model is highly expected as a useful simulation model for the dynamic NCFET with a multi-domain FE-HZO gate insulator.

Experimental Observation and Simulation Model for Transient Characteristics of Negative-Capacitance in Ferroelectric HfZrO 2 Capacitor

We have designed and fabricated a nonvolatile SRAM (NVSRAM) integrated with ferroelectric HfO 2 capacitor, and experimentally demonstrated its nonvolatile functionality, for the first time. Sub-10nm-thick ferroelectric HfO 2 capacitor shows excellent ferroelectricity and memory characteristics at low supply voltage. The NVSRAM with ferroelectric HfO 2 capacitor is capable of storing and recalling previous memory state before power shutdown, which is suitable for the intermittent operation of IoT devices with deep-sleep mode. The NVSRAM with ferroelectric HfO 2 capacitor can be a cost-effective, normally-off and ultralow power embedded memory solution.

A nonvolatile SRAM integrated with ferroelectric HfO 2 capacitor for normally-off and ultralow power IoT application

In order to realize ultralow power Internet-of-Things (IoT) edge devices, standby leakage current must be suppressed because activity of IoT device is very small in an intermittent mode. One of the approaches for ultralow power consumption is normally off computing by utilizing nonvolatile memory. After the discovery of ferroelectricity in HfO2 which is compatible to CMOS integration, ferroelectric nonvolatile memory has been revisited. In this paper, toward normally off computing, we have proposed, designed, and fabricated nonvolatile SRAM integrated with ferroelectric HfO2 capacitor in a simple architecture with two capacitors. Fundamental store and recall operation have been demonstrated. This device technology will open a new path for ultralow power IoT application.

Nozomu Ueyama

Papers

Experimental study on polarization-limited operation speed of negative capacitance FET with ferroelectric HfO 2

Negative Capacitance for Boosting Tunnel FET performance

Experimental Observation and Simulation Model for Transient Characteristics of Negative-Capacitance in Ferroelectric HfZrO 2 Capacitor

A nonvolatile SRAM integrated with ferroelectric HfO 2 capacitor for normally-off and ultralow power IoT application

Experimental Demonstration of a Nonvolatile SRAM With Ferroelectric HfO 2 Capacitor for Normally Off Application