There is, I think, something ethereal about i —the square root of minus one. I remember first hearing about it at school. It seemed an odd beast at that time—an intruder hovering on the edge of reality.

Usually familiarity dulls this sense of the bizarre, but in the case of i it was the reverse: over the years the sense of its surreal nature intensified. It seemed that it was impossible to write mathematics that described the real world in …

I and i

THE DESIGN AND ANALYSIS OF EXPERIMENTS. By Oscar Kempthorne. New York, John Wiley and Sons, Inc., 1952. 631 pp. $8.50. This book by a teacher of statistics (as well as a consultant for \"experimenters\") is a comprehensive study of the philosophical background for the statistical design of experiment. It is necessary to have some facility with algebraic notation and manipulation to be able to use the volume intelligently. The problems are presented from the theoretical point of view, without such practical examples as would be helpful for those not acquainted with mathematics. The mathematical justification for the techniques is given. As a somewhat advanced treatment of the design and analysis of experiments, this volume will be interesting and helpful for many who approach statistics theoretically as well as practically. With emphasis on the \"why,\" and with description given broadly, the author relates the subject matter to the general theory of statistics and to the general problem of experimental inference. MARGARET J. ROBERTSON

The Design and Analysis of Experiments

We will review some of the major results in random graphs and some of the more challenging open problems. We will cover algorithmic and structural questions. We will touch on newer models, including those related to the WWW.

Random graphs

The PASCAL Visual Object Classes Challenge

Many metabolomics, and other high-content or high-throughput, experiments are set up such that the primary aim is the discovery of biomarker metabolites that can discriminate, with a certain level of certainty, between nominally matched ‘case’ and ‘control’ samples. However, it is unfortunately very easy to find markers that are apparently persuasive but that are in fact entirely spurious, and there are well-known examples in the proteomics literature. The main types of danger are not entirely independent of each other, but include bias, inadequate sample size (especially relative to the number of metabolite variables and to the required statistical power to prove that a biomarker is discriminant), excessive false discovery rate due to multiple hypothesis testing, inappropriate choice of particular numerical methods, and overfitting (generally caused by the failure to perform adequate validation and cross-validation). Many studies fail to take these into account, and thereby fail to discover anything of true significance (despite their claims). We summarise these problems, and provide pointers to a substantial existing literature that should assist in the improved design and evaluation of metabolomics experiments, thereby allowing robust scientific conclusions to be drawn from the available data. We provide a list of some of the simpler checks that might improve one’s confidence that a candidate biomarker is not simply a statistical artefact, and suggest a series of preferred tests and visualisation tools that can assist readers and authors in assessing papers. These tools can be applied to individual metabolites by using multiple univariate tests performed in parallel across all metabolite peaks. They may also be applied to the validation of multivariate models. We stress in particular that classical p-values such as “p < 0.05”, that are often used in biomedicine, are far too optimistic when multiple tests are done simultaneously (as in metabolomics). Ultimately it is desirable that all data and metadata are available electronically, as this allows the entire community to assess conclusions drawn from them. These analyses apply to all high-dimensional ‘omics’ datasets.

/pdf/statistical-strategies-for-avoiding-false-discoveries-in-397pr411pd.pdf

Statistical strategies for avoiding false discoveries in metabolomics and related experiments

In recent years, Assertion-Based Verification is being widely accepted as a key technology in the pre-silicon vali dation of system-on-chip(SOC) designs. The System Verilog language integrates the specification of assertions with the hardware description. In this paper we show that there are several compelling reasons for synthesizing assertions in hardware, and present an approach for synthesizing System Verilog Assertions (SVA) in hardware. Our method investi gates the structure of SVA properties and decomposes them into simple communicating parallel hardware units that to gether act as a monitor for the property. We present a tool that performs this synthesis, and also show that the chip area required by the monitors for a industry standard ABV IP for the ARM AMBA AHB protocol is quite modest.

Synthesis of System Verilog Assertions

Multiobjective Heuristic Search

With advancements in technology, the automotive industry is experiencing a paradigm shift from assisted driving to highly automated driving. However, autonomous driving systems are highly safety critical in nature and need to be thoroughly tested for a diverse set of conditions before being commercially deployed. Due to the huge complexities involved with Advanced Driver Assistance Systems (ADAS) and Automated Driving Systems (ADS), traditional software testing methods have well-known limitations. They also fail to cover the infinite number of adverse conditions that can occur due to a slight change in the interactions between the environment and the system. Hence, it is important to identify test conditions that push the vehicle under test to breach its safe boundaries. Hazard Based Testing (HBT) methods, inspired by Systems-Theoretic Process Analysis (STPA), identify such parameterized test conditions that can lead to system failure. However, these techniques fall short of discovering the exact parameter values that lead to the failure condition. The presented paper proposes a test case identification technique using Bayesian Optimization. For a given test scenario, the proposed method learns parameter values by observing the system’s output. The identified values create test cases that drive the system to violate its safe boundaries. STPA inspired outputs (parameters and pass/fail criteria) are used as inputs to the Bayesian Optimization model. The proposed method was applied to an SAE Level-4 Low Speed Automated Driving (LSAD) system which was modelled in a driving simulator.

/pdf/identification-of-test-cases-for-automated-driving-systems-1p2sybxmxu.pdf

Identification of Test Cases for Automated Driving Systems Using Bayesian Optimization

1. Introduction. 1.1. Writing our First Formal Specification. 1.2. Is my specification correct? 1.3. Have I written enough properties? 1.4. Property Verification. 1.5. Verification by Specification Refinement. 1.6. The new flow. 2. Languages for Temporal Properties. 2.1. The basic temporal operators. 2.2. Logics for temporal specification. 2.3. System Verilog Assertions. 2.4. Architectural Styles for Assertion IPs. 2.5. Concluding Remarks. 2.6. Bibliographic Notes. 3. How does the property checker work? 3.1. Checkers are state machines! 3.2. The verification strategy. 3.3. Dynamic property verification. 3.4. Formal property verification. 3.5. BDD-based Formal Property Verification. 3.6. SAT-based Formal Property Verification. 3.7. Concluding Remarks. 3.8. Bibliographic Notes. 4. Is my specification consistent? 4.1. Satisfiability and Vacuity. 4.2. Satisfiability is not enough. 4.3. Games with the Environment. 4.4. Methods for Consistency Checking. 4.5. The SpecChecker Tool. 4.6. Concluding Remarks. 4.7. Bibliographic Notes. 5. Have I written enough properties? 5.1. Simulation Coverage Metrics. 5.2. Mutation-based FPV Coverage. 5.3. Structural versus Functional Coverage. 5.4. Fault-based FPV Coverage. 5.5. Concluding Remarks. 5.6. Bibliographic Notes. 6. Design Intent Coverage. 6.1. An Introductory Example. 6.2. The Formal Problem. 6.3. The Intent Coverage Algorithm. 6.4. Soundness of the Intent Coverage Algorithm. 6.5. Multi-property representation of the coverage gap. 6.6. SpecMatcher -- The Intent Coverage Tool. 6.7. Priority Cache Access -- A closer look. 6.8. Concluding Remarks. 6.9.Bibliographic Notes 7. Test Generation Games. 7.1. Constraint Random Test Generation. 7.2. Assertions viewed as Coverage Points! 7.3. Games with the Environment 7.4. Intelligent Test Generation for Property Coverage. 7.5. The Integrated Verification Flow. 7.6. Concluding Remarks. 7.7. BibliographicNotes. 8. A Roadmap for Formal Property Verification. 8.1. Simulation-based Validation Flow. 8.2. Formal Verification Flow. 8.3. The Three Pillars. 8.4. The Integrated Flow. 8.5. Sharing the Task. 8.6. Concluding Remarks. 8.7. Bibliographic Notes. 9. References

A Roadmap for Formal Property Verification

In a typical enterprise network, there are several sub-networks or network zones corresponding to different departments or sections of the organization. These zones are interconnected through set of Layer-3 network devices (or routers). The service accesses within the zones and also with the external network (e.g., Internet) are usually governed by a enterprise-wide security policy. This policy is implemented through appropriate set of access control lists (ACL rules) distributed across various network interfaces of the enterprise network. Such networks faces two major security challenges, (i) conflict free representation of the security policy, and (ii) correct implementation of the policy through distributed ACL rules. This work presents a formal verification framework to analyze the security implementations in an enterprise network with respect to the organizational security policy. It generates conflict-free policy model from the enterprise-wide security policy and then formally verifies the distributed ACL implementations with respect to the conflict-free policy model. The complexity in the verification process arises from extensive use of temporal service access rules and presence of hidden service access paths in the networks. The proposed framework incorporates formal modeling of conflict-free policy specification and distributed ACL implementation in the network and finally deploys Boolean satisfiability (SAT) based verification procedure to check the conformation between the policy and implementation models.

Pallab Dasgupta

Papers

Synthesis of System Verilog Assertions

Multiobjective Heuristic Search

Identification of Test Cases for Automated Driving Systems Using Bayesian Optimization

A Roadmap for Formal Property Verification

Policy Based Security Analysis in Enterprise Networks: A Formal Approach