Methods of semiconductor device fabrication are disclosed. An exemplary method includes processes of depositing a first pattern on a semiconductor substrate, wherein the first pattern defines wide and narrow spaces; depositing spacer material over the first pattern on the substrate; etching the spacer material such that the spacer material is removed from horizontal surfaces of the substrate and the first pattern but remains adjacent to vertical surfaces of a wide space defined by the first pattern and remains within narrow a space defined by the first pattern; and removing the first pattern from the substrate. In one embodiment, the first pattern can comprise sacrificial material, which can include, for example, polysilicon material. The deposition can comprise physical vapor deposition, chemical vapor deposition, electrochemical deposition, molecular beam epitaxy, atomic layer deposition or other deposition techniques. According to another embodiment, features for lines and logic device components having a width greater than that of the lines are formed in the spacer material in the same mask layer.

Method of eliminating a lithography operation

A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be etched is provided, then an initial sacrificial patterning layer, for example formed using optical lithography, is formed over the layer to be etched. Depending on the embodiment, the patterning layer may be trimmed, then a series of spacer layers formed and etched. The number of spacer layers and their target dimensions depends on the desired increase in feature density. An in-process semiconductor device and electronic system is also described.

Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device and systems including same

Polymer features may be formed on a substrate by applying a polymer to a photoresist pattern which is subsequently removed to generate the desired polymer features.

Forming polymer features on a substrate

A method of making a device includes forming a first photoresist layer over an underlying layer, patterning the first photoresist layer to form a first photoresist pattern comprising a first grid, rendering the first photoresist pattern insoluble to a solvent, forming a second photoresist layer over the first photoresist pattern, patterning the second photoresist layer to form a second photoresist pattern over the underlying layer, where the second photoresist pattern is a second grid which overlaps the first grid to form a photoresist web, and etching the underlying layer using the photoresist web as a mask.

Double patterning method

A method of fabricating a substrate includes forming first and second spaced features over a substrate. The first spaced features have elevationally outermost regions which are different in composition from elevationally outermost regions of the second spaced features. The first and second spaced features alternate with one another. Every other first feature is removed from the substrate and pairs of immediately adjacent second features are formed which alternate with individual of remaining of the first features. After such act of removing, the substrate is processed through a mask pattern comprising the pairs of immediately adjacent second features which alternate with individual of the remaining of the first features. Other embodiments are disclosed.

Methods of Fabricating Substrates

An image reversal method of turning hybrid photoresist spaces into resist lines for sub-feature size applications The sub-feature size space width of the high resolution hybrid photoresist is largely independent of the lithographic process and mask reticles These sub-feature size spaces formed by the hybrid resist are then turned into sub-feature size lines using Spin-On-Glass, SOG The SOG is first coated over the entire patterned hybrid resist to fill in the hybrid spaces and cover the photoresist SOG is then recessed back to expose the photoresist layer The exposed photoresist is then removed The sub-feature size lines are then left behind as a mask to pattern the same onto the underlying films on the substrate

Resist image reversal by means of spun-on-glass

A method for forming contacts on an integrated circuit that are self-aligned with the wiring patterns of the integrated circuit In the method a thicker lower layer of a first material and a thinner upper layer of a second material are formed on a substrate The features of the metal wiring is patterned first on the upper layer The wiring pattern trenches are etched through the thinner surface layer, and partially through the second, thicker layer After the wiring pattern is etched, the contacts for the wiring layer are printed as line/space patterns which intersect the wiring pattern The contact pattern is etched into the lower, thicker layer with an etch process that is selective to the upper thinner layer The contact is only formed at the intersection point of the wiring image with the contact image, therefore the contact is self-aligned to the metal

Process for self-alignment of sub-critical contacts to wiring

PURPOSE: A resist image reversal process for converting a photoresist space into a photoresist line is provided together with an integrated circuit chip produced by the process to obtain higher feature density. CONSTITUTION: In this process, a sub-critical high-resolution space of a hybrid photoresist is provided and then converted into a line. A photoresist layer is formed on a substrate having a gate dielectric layer(106) thereunder, and then patterned to form openings as the photoresist space. Next, a spun-on-glass oxide is deposited on the photoresist layer, filling the openings in the photoresist layer. The spun-on-glass oxide is then etched so that the top of the photoresist layer is exposed and therefore the spun-on-glass oxide remains only within the openings. Subsequently, the photoresist layer is completely removed, and thereby a spun-on-glass line(105) converted from the photoresist space is obtained on the substrate. Additionally, the spun-on-glass line(105) is used as a substrate-etching mask.

Paul A. Rabidoux

Papers

Resist image reversal by means of spun-on-glass

Process for self-alignment of sub-critical contacts to wiring

Resist image reversal process and integrated circuit chip thereof