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Showing papers by "Paul Jespers published in 1985"


Journal ArticleDOI
TL;DR: The architecture and design methodology used to produce a new custom IC intended for automatic document analysis, implements the entire operative part of a dedicated microprogrammed processor for the next generation of page readers which include items such as Optical Character Recognition (OCR) and different codings for graphics and images.
Abstract: This paper describes the architecture and design methodology used to produce a new custom IC intended for automatic document analysis. The circuit implements the entire operative part of a dedicated microprogrammed processor for the next generation of page readers which include items such as Optical Character Recognition (OCR) and different codings for graphics and images. The chip provides a wide range of powerful functions, performing up to three operations per cycle. It includes about 10 000 transistor sites and occupies an area of 20 mm/sup 2/. A standard 6-/spl mu/m NMOS technology was used. Typical clock frequency is 2 MHz. The layout was obtained using a highly regular architecture and some automatically generated structures. New CAD tools provided an efficient and short design procedure.

4 citations


Proceedings ArticleDOI
01 Jan 1985
TL;DR: A 2MHz optical character recognition chip whose architecture can support algorithms for preprocessing, binarization and feature extraction will be reported.
Abstract: A 2MHz optical character recognition chip whose architecture can support algorithms for preprocessing, binarization and feature extraction will be reported. The chip (3.9mm× 7mm) was made with 6μm NMOS technology, and contains 13000 transistors. Dissipation is 300mW.

2 citations


Proceedings ArticleDOI
01 Sep 1985
TL;DR: In this paper, an IC implementation of an arithmetic unit performing addition without carry propagation for a cryptographic application is presented, where the arithmetic unit performs addition without carrying any carry-propagation.
Abstract: This paper presents an IC realization of an arithmetic unit performing addition without carry propagation for a cryptographic application.