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Pei Liu

Researcher at Royal Institute of Technology

Publications -  9
Citations -  41

Pei Liu is an academic researcher from Royal Institute of Technology. The author has contributed to research in topics: Speedup & Hardware acceleration. The author has an hindex of 4, co-authored 8 publications receiving 34 citations.

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3D-Stacked Many-Core Architecture for Biological Sequence Analysis Problems

TL;DR: This work presents and evaluates a VLSI architecture with a focus on those that target at biological sequences directly, including pairwise sequence alignment, multiple sequence alignments, database search, and short read sequence mappings, and proposes the use of many-core and 3D-stacked technologies to gain further improvement over memory subsystem.
Proceedings ArticleDOI

3D-stacked many-core architecture for biological sequence analysis problems

TL;DR: This work presents and evaluates a VLSI architecture with a focus on those that target at biological sequences directly, including pairwise alignment, multiple sequence alignment, database search, and short read sequence mappings, and proposes the use of many-core and 3D-stacked technologies to gain further improvement over memory subsystem.
Proceedings ArticleDOI

A Coarse-Grained Reconfigurable Processor for Sequencing and Phylogenetic Algorithms in Bioinformatics

TL;DR: A coarse-grained reconfigurable processor tailored for accelerating multiple bioinformatics algorithms is proposed, which is a much better match on architecture and algorithms for the core computational needs, as well as the system level architectural needs.
Proceedings ArticleDOI

A Coarse Grain Reconfigurable Architecture for sequence alignment problems in bio-informatics

Pei Liu, +1 more
TL;DR: The key difference of the proposed CGRA based solution compared to FPGA and GPU based solutions is a much better match of the architecture and algorithm for the core computational need as well as the system level architectural need.
Journal ArticleDOI

DSIM: Distributed Sequence Matching on Near-DRAM Accelerator for Genome Assembly

TL;DR: DSIM is proposed, a scalable FM-Index querying on near-DRAM accelerators that supports highly parallel multi-step query processing by distributing partialFM-Index table to different DRAM chips and supports scalability to multiple DIMMs (Dual-Inline Memory Modules).