An ultrathin equivalent oxide thickness (EOT) Al2O3/ GeOx/Ge gate stack with a superior GeOx/Ge metal-oxide-semiconductor (MOS) interface and p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) using this gate stack have been fabricated by a plasma post oxidation method. The properties of the GeOx/ Ge MOS interfaces are systemically investigated, and it is revealed that there is a universal relationship between the interface state density (Dit) at the GeOx/Ge interface and the GeOx interfacial layer thickness. Ge pMOSFETs on a (100) Ge substrate using the Al2O3/GeOx/Ge gate stack have been demonstrated with an EOT down to 0.98 nm. It is found that the Ge pMOSFETs exhibit the peak hole mobility values of 515, 466, and 401 cm2/ V·s at an EOT of 1.18, 1.06, and 0.98 nm, respectively, which has much weaker EOT dependence than the trend of the hole mobility values reported so far, because of low Dit of the present gate stack in the ultrathin EOT region of ~1 nm.

High-Mobility Ge pMOSFET With 1-nm EOT $\hbox{Al}_{2} \hbox{O}_{3}/\hbox{GeO}_{x}/\hbox{Ge}$ Gate Stack Fabricated by Plasma Post Oxidation

An electron cyclotron resonance (ECR) plasma postoxidation method has been employed for forming Al2O3/GeOx/Ge metal-oxide-semiconductor (MOS) structures. X-ray photoelectron spectroscopy and transmission electron microscope characterizations have revealed that a GeOx layer is formed beneath the Al2O3 capping layer by exposing the Al2O3/Ge structures to ECR oxygen plasma. The interface trap density (Dit) of Au/Al2O3/GeOx/Ge MOS capacitors is found to be significantly suppressed down to lower than 1011 cm−2 eV−1. Especially, a plasma postoxidation time of as short as 10 s is sufficient to reduce Dit with maintaining the equivalent oxide thickness (EOT). As a result, the minimum Dit values and EOT of 5×1010 cm−2 eV−1 and 1.67 nm, and 6×1010 cm−2 eV−1 and 1.83 nm have been realized for Al2O3/GeOx/Ge MOS structures with p- and n-type substrates, respectively.

Al2O3/GeOx/Ge gate stacks with low interface trap density fabricated by electron cyclotron resonance plasma postoxidation

The performance of strained silicon (Si) as the channel material for today's metal-oxide-semiconductor field-effect transistors may be reaching a plateau. New channel materials with high carrier mobility are being investigated as alternatives and have the potential to unlock an era of ultra-low-power and high-speed microelectronic devices. Chief among these new materials is germanium (Ge). This work reviews the two major remaining challenges that Ge based devices must overcome if they are to replace Si as the channel material, namely, heterogeneous integration of Ge on Si substrates, and developing a suitable gate stack. Next, Ge is compared to compound III-V materials in terms of p-channel device performance to review how it became the first choice for PMOS devices. Different Ge device architectures, including surface channel and quantum well configurations, are reviewed. Finally, state-of-the-art Ge device results and future prospects are also discussed.

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Germanium Based Field-Effect Transistors: Challenges and Opportunities

The current status of High K dielectrics in Very Large Scale Integrated circuit (VLSI) manufacturing for leading edge Dynamic Random Access Memory (DRAM) and Complementary Metal Oxide Semiconductor (CMOS) applications is summarized along with the deposition methods and general equipment types employed. Emerging applications for High K dielectrics in future CMOS are described as well for implementations in 10 nm and beyond nodes. Additional emerging applications for High K dielectrics include Resistive RAM memories, Metal-Insulator-Metal (MIM) diodes, Ferroelectric logic and memory devices, and as mask layers for patterning. Atomic Layer Deposition (ALD) is a common and proven deposition method for all of the applications discussed for use in future VLSI manufacturing.

Emerging Applications for High K Materials in VLSI Technology

Germanium CMOS potential from material and process perspectives: Be more positive about germanium

GeO2 was grown by a slot-plane-antenna (SPA) high density radical oxidation, and the oxidation kinetics of radical oxidation GeO2 was examined. By the SPA radical oxidation, no substrate orientation dependence of growth rate attributed to highly reactive oxygen radicals with low oxidation activation energy was demonstrated, which is highly beneficial to three-dimensional structure devices, such as multigate field-effect transistors, to form conformal gate dielectrics. The electrical properties of an aluminum oxide (Al2O3) metal-oxide-semiconductor gate stack with a GeO2 interfacial layer were investigated, showing very low interface state density (Dit), 1.4×1011 cm−2 eV−1. By synchrotron radiation photoemission spectroscopy, the conduction and the valence band offsets of GeO2 with respect to Ge were estimated to be 1.2±0.3 and 3.6±0.1 eV, which are sufficiently high to suppress gate leakage.

Radical oxidation of germanium for interface gate dielectric GeO2 formation in metal-insulator-semiconductor gate stack

Porous nitride semiconductors are a fast-developing area of study, which open up a wide range of new properties and applications, including strain free optical reflectors, chemical sensors and as a pathway to device lift-off. This article reviews the current progress in porous nitrides formed through electrochemical and photoelectrochemical methods. Using a simple electrochemical cell, pores are formed by injecting holes into the surface layer in order to oxidise the material into a soluble form and releasing nitrogen gas. The process is controlled principally by the electric field that drives the injection of holes and hence the applied potential and doping density are the key parameters for controlling pore morphology, along with how and whether illumination is used. We describe the mechanisms responsible for this process in detail and outline the trends for changing pore size and pore shape. For example, larger applied potential creates a larger electric field and hence larger pores. These methods have been used to produce a wide variety of different structures. We present a layered porous structure created by the modulation of the applied potential. Alternatively, layered structures can be produced by growing alternate doped and non-intentionally doped layers. Electrochemical etching can then create pores only in the doped layers, as they are conductive. This process can be performed by etching laterally through access trenches that expose the doped material or through the etching of dislocations to create nanopipes that allow subsurface porosity to form. This process requires no prior processing steps. We combine this method with patterning of surface protective layers to influence where the resulting pores grow. Based on these various fabrication processes, significant progress has been made towards applications of porous GaN across optoelectronics, sensing and for improving material quality.

Porous Nitride Semiconductors Reviewed

Halide perovskites hold exceptional promise as cheap, low temperature solution-processed optoelectronic materials. Yet they are hindered by poor structural and chemical stability, rapidly degrading when exposed to moisture or air. We demonstrate a solution-phase method for infiltrating methylammonium lead bromide perovskite (CH3NH3PbBr3, or MAPbBr3) into nanoporous GaN which preserved the green photoluminescence of the perovskite after up to 1 year of storage under ambient conditions. Besides a protective effect, confinement within the porous GaN matrix also resulted in a blueshift of the perovskite emission with decreasing pore size, suggesting an additional templating effect of the pores on the size of the perovskite crystals within. We anticipate that our method may be generalised to related perovskite materials, offering a route to producing composites of interest for use in optoelectronic devices for various applications.

Encapsulation of methylammonium lead bromide perovskite in nanoporous GaN

Utilising dislocation-related vertical etching channels in gallium nitride, we have previously demonstrated a simple electrochemical etching (ECE) process that can create layered porous GaN structures to form distributed Bragg reflectors for visible light at wafer scale. Here, we apply the same ECE process to realise AlGaN-based ultraviolet distributed Bragg reflectors (DBRs). These are of interest because they could provide a pathway to non-absorbing UV reflectors to enhance the performance of UV LEDs, which currently have extremely low efficiency. We have demonstrated porous AlGaN-based UV DBRs with a peak reflectance of 89% at 324 nm. The uniformity of these devices is currently low, as the as-grown material has a high density of V-pits and these alter the etching process. However, our results indicate that if the material growth is optimised, the ECE process will be useful for the fabrication of UV reflectors.

Porous AlGaN-Based Ultraviolet Distributed Bragg Reflectors

Porosification of nitride semiconductors provides a new paradigm for advanced engineering of the properties of optoelectronic materials. Electrochemical etching creates porosity in doped layers while leaving undoped layers undamaged, allowing the realization of complex three-dimensional porous nanostructures, potentially offering a wide range of functionalities, such as in-distributed Bragg reflectors. Porous/non-porous multilayers can be formed by etching the whole, as-grown wafers uniformly in one simple process, without any additional processing steps. The etch penetrates from the top down through the undoped layers, leaving them almost untouched. Here, atomic-resolution electron microscopy is used to show that the etchant accesses the doped layers via nanometer-scale channels that form at dislocation cores and transport the etchant and etch products to and from the doped layer, respectively. Results on AlGaN and non-polar GaN multilayers indicate that the same mechanism is operating, suggesting that this approach may be applicable in a range of materials.

Peter Griffin

Papers

Radical oxidation of germanium for interface gate dielectric GeO2 formation in metal-insulator-semiconductor gate stack

Porous Nitride Semiconductors Reviewed

Encapsulation of methylammonium lead bromide perovskite in nanoporous GaN

Porous AlGaN-Based Ultraviolet Distributed Bragg Reflectors

Dislocations as channels for the fabrication of sub-surface porous GaN by electrochemical etching