P
Peter Puschner
Researcher at Vienna University of Technology
Publications - 139
Citations - 5751
Peter Puschner is an academic researcher from Vienna University of Technology. The author has contributed to research in topics: Worst-case execution time & Code generation. The author has an hindex of 32, co-authored 137 publications receiving 5474 citations. Previous affiliations of Peter Puschner include University of Vienna & Information Technology University.
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Proceedings ArticleDOI
Development of a Framework for Automated Systematic Testing of Safety-Critical Embedded Systems
TL;DR: A framework for testing safety-critical embedded systems based on the concepts of model-based testing that is an automaton model that is automatically extracted from the C-source code of the system under test is introduced.
Book ChapterDOI
A Single-Path Chip-Multiprocessor System
TL;DR: This paper explores the combination of a time-predictable chip-multiprocessor system with the single-path programming paradigm, and time-sliced arbitration of the main memory access provides time-Predictable memory load and store instructions.
Proceedings ArticleDOI
A Generator for Time-Predictable Code
TL;DR: The evaluation on a real-world application shows that the implementation of a single-path code generator in a compiler for a time-predictable processor is a practicable strategy for the construction of time-Predictable software components.
Proceedings ArticleDOI
Modeling and Simulated Fault Injection for Time-Triggered Safety-Critical Embedded Systems
TL;DR: This paper presents a novel modeling and simulation framework that supports simulated fault injection at different abstraction levels (platform independent and platform specific models) and integrates a time-triggered automatic test executor for the early verification and validation of the systems.
Proceedings ArticleDOI
Towards Composable Timing for Real-Time Programs
TL;DR: This paper will discuss deficiencies in current real-time embedded hardware and software structures with respect to achieving the goal of composable and compositional timing behavior, and discuss programming methods, code generation techniques, and ideas aboutHardware and software architectures that should help in achieving a truly timing-composable and Compositional engineering process for real- time software systems.