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Showing papers by "Puqi Ning published in 2017"


Journal ArticleDOI
01 Dec 2017
TL;DR: In this paper, a phase-leg SiC/Si hybrid module was designed, developed, and tested, and the IC chip for gate drive was carefully selected and compared with a pure SiC MOSFET.
Abstract: A compact wirebond packaged phase-leg SiC/Si hybrid module was designed, developed, and tested. Details of the layout and gate drive designs are described. The IC chip for gate drive is carefully selected and compared. Dual pulse test confirmed that, the switching loss of hybrid module is close to pure SiC MOSFET module, and it is much less than pure Si IGBT device. The cost of hybrid module is closer to Si IGBT.

23 citations


Journal ArticleDOI
30 Oct 2017
TL;DR: In this article, the SiC chip's current-carrying capability enhancement is discussed for a compact inverter of tens and hundreds of kilowatts, where SiC module packaging, dc-link capacitor function analysis and system level integration are discussed.
Abstract: Along with the rapid growth in electric vehicle (EV) market, higher power density and more efficient motor drive inverters are required. It is well known that silicon carbide (SiC) has advantages of high temperature, high efficiency and high switching frequency. It is believed that the appropriate utilization of these merits can pave the way to ultra-high power density inverters. This paper presents issues about SiC chip’s current-carrying capability enhancement which is crucial for a compact inverter of tens and hundreds of kilowatts. Technical approaches towards ultra-high power density EV inverter including SiC module packaging, dc-link capacitor function analysis and system level integration are discussed. Different PWM algorithms which may improve efficiency and help to reduce the inverter volume are also studied.

22 citations


Proceedings ArticleDOI
01 Oct 2017
TL;DR: It is obvious that utilizing to the full potential of SiC devices is critical for increasing the reliability of package, and design for novel package structure (e.g. without bond wires) may be a possible solution.
Abstract: Silicon carbide (SiC) devices have its unique advantages of high operating temperature, high voltage capability with low switching losses when compared to its silicon counterparts. This paper presents a systematic method for long-term reliability analysis for SiC devices. The reliability block diagrams (RBDs) have been established for a SiC power module with standard wire-bonded package. The reliability function and mean time to failure (MTTF) for this module has been estimated by using the lifetime models for single bond wire and SiC chip. The analysis shows that the bond wires are the weakest line of the whole device's reliability. Therefore, it is obvious that utilizing to the full potential of SiC devices is critical for increasing the reliability of package. Design for novel package structure (e.g. without bond wires) may be a possible solution.

21 citations


Proceedings ArticleDOI
Lei Li1, Puqi Ning1, Xuhui Wen1, Yaohua Li1, Qiongxuan Ge1, Dong Zhang1, Xiang Tai1 
26 Mar 2017
TL;DR: In this paper, a high-resolution measurement circuit is designed to detect the turnoff delay time and estimate the corresponding junction temperature of insulated-gate bipolar transistors (IGBTs).
Abstract: Turn-off delay time is temperature sensitive and can be used to estimate the junction temperature of insulated-gate bipolar transistors (IGBTs). In this paper, a high-resolution measurement circuit is designed to detect the turn-off delay time and estimate the corresponding junction temperature. Details of the circuit are demonstrated. Turn-off delay time at different junction temperature, different switching current and different switching voltage is investigated using the measurement circuit. Based on the experimental results, the junction temperature estimation method is tested on IGBT device IKW40N120T2. Compared with the on-state collector-emitter voltage-based method and short current-based method, turn-off delay time-based method shows the feature of high accuracy and feasible online estimation.

18 citations


Proceedings ArticleDOI
01 Oct 2017
TL;DR: In this paper, an electromagnetic interference (EMI) filter design method for electric vehicle (EV) application is proposed by transforming the design problem to an optimization problem, the filter volume, system disturbance level, inverter touch current and filter leakage current are taken into account simultaneously.
Abstract: An electromagnetic interference (EMI) filter design method for electric vehicle (EV) application is proposed in this paper. By transforming the design problem to an optimization problem, the filter volume, system disturbance level, inverter touch current and filter leakage current are taken into account simultaneously. A topology and order evolution approach is merged into the optimization algorithm based design procedure, thus the filter topology and its order can be determined automatically.

14 citations


Proceedings ArticleDOI
01 Aug 2017
TL;DR: In this article, different thermo-sensitive electrical parameters (TSEPs) are investigated about their potential to measure the junction temperature of SiC MOSFETs, and the measurement circuit is introduced for each parameter.
Abstract: Compared with the silicon semiconductors, silicon carbide (SiC) metal-oxide-semiconductor Field-Efiect transistor (MOSFET) can operate at higher switching frequency and higher temperature, which makes the junction temperature estimation more significant and challenging. In this paper, different thermo- sensitive electrical parameters (TSEPs) are investigated about their potential to measure the junction temperature of SiC MOSFET. The measurement circuit is introduced for each parameter. According to the results by far, it's really hard to estimate the SiC MOSFET junction temperature by TSEPs because of their non-monotonic dependence or low sensitivity.

7 citations


Proceedings ArticleDOI
01 Aug 2017
TL;DR: In this article, a method of calibrating the transient thermal finite element model using the measured thermal structural function is proposed and practiced, demonstrating the operability and feasibility of the method, and the experimental results were compared.
Abstract: The thermal finite element model of the power module based on the actual physical conditions is not easy to be consistent with the experimental results, limited by the accuracy of the input conditions. In this paper, a method of calibrating the transient thermal finite element model using the measured thermal structural function is proposed and practiced. The structural functions derived from the simulation finite element model are compared with the experimental one. Based on the comparisons, the modification of the detailed model can greatly improve the accuracy of the simulation. Finally, the transient thermal response characteristics of the calibration model and the experimental results were compared, demonstrating the operability and feasibility of the method.

6 citations


Proceedings ArticleDOI
Lei Li1, Puqi Ning1, Zhuolin Duan1, Dong Zhang1, Xuhui Wen1 
01 Aug 2017
TL;DR: In this article, the eliects of decoupling capacitors are explained from the time-domain and the frequency-domain, and the decoupled capacitance selection strategy is proposed according to the analysis.
Abstract: The main function of the DC-link decoupling capacitors, integrated between the voltage source and the power devices, is to suppress the effect of the parasitic inductors and minimize the voltage overshoot. Besides, decoupling capacitors can also affect the electromagnetic interference frequency spectra. In this paper, the eliects of decoupling capacitors are explained from the time-domain and the frequency-domain. The decoupling capacitance selection strategy is proposed according to the analysis.

5 citations


Proceedings ArticleDOI
Lei Li1, Puqi Ning1, Zhuolin Duan1, Dong Zhang1, Xuhui Wen1, Zhijie Qiu1 
01 Oct 2017
TL;DR: The main function of the DC-link decoupling capacitors, integrated between the voltage source and the power devices, is to suppress the effect of the parasitic inductors and minimize the voltage overshoot.
Abstract: DC-link capacitors are usually utilized in voltage source converters to stabilize the DC-link voltage and suppress the transmission of current harmonics into the power grid. To guarantee the reliability of voltage source converters, in addition to select the DC-link capacitors with optimum capacitance, appropriate rated voltage and enough ripple current capacity, thermal design is also of great importance. In this paper, the DC-link capacitors heating in voltage source inverters is evaluated. A novel cooling structure of DC-link capacitor is designed. The heating dissipation capability of the novel structure capacitor increases more than 60% compared to the traditional one, which is a key step to increase the power density of voltage source inverter.

5 citations


Journal ArticleDOI
01 Dec 2017
TL;DR: In this article, an improved layout design method for planar power modules is presented, along with the design example, and some practical considerations and implementations are also introduced in the optimization of module layout design.
Abstract: The layout of power modules is one of the key points in power module design, especially for silicon carbide module, which may parallel more devices compared with silicon counterpart. In this paper, along with the design example, a improved layout design method for planar power modules is presented. Some practical considerations and implementations are also introduced in the optimization of module layout design.

4 citations


Proceedings ArticleDOI
01 Aug 2017
TL;DR: In this paper, a hybrid genetic algorithm is used to design the layout automatically by MATLAB in order to optimize the layout with the lowest parasitic effect, and then the Q3D software was used to verify the automatic calculation results by comparing with some others in manual ways.
Abstract: The parasitic parameters in the power module have a negative effect on switching losses and dynamic characteristics. With the rapid development of integrated circuit technology, the high current, high frequency and high pressure working environment put forward higher requirements for the switching circuit delay, reliability and power consumption. The rational layout of the power module is the key to reducing the parasitic parameters. However, today's designers often propose the layout manually, which is time- and money-consuming. Recently, automatic layout design of power modules has attracted more and more attention. In this paper, a hybrid genetic algorithm is used to design the layout automatically by MATLAB in order to optimize the layout with the lowest parasitic effect. Then we used the Q3D software to verify the automatic calculation results by comparing the calculated layout with some others in manual ways.

Proceedings ArticleDOI
01 Aug 2017
TL;DR: In this paper, the die attach material was preform compressed with Cu@Sn core-shell microparticles, which were produced using an electroless process and then soldered at 250 °C for 4 min, the outer Sn completely transformed into tri-dimensional network-like structure intermetallic compounds (IMCS) Cu 6 Sn 5 and Cu 3 Sn, and the inner Sn cores were interconnected by the formed networklike IMCS, with a high remelting temperature.
Abstract: This paper presents a novel die attach material that withstands high working temperature of at least 415 °C after low temperature liquid bonding at 250 °C. The die attach material was preform compressed with Cu@Sn core-shell microparticles, which were produced using an electroless process. When the reflow temperature reached Sn melting point, the outer Sn layer melted and connected the inner Cu cores. After reflow soldering at 250 °C for 4 min, the outer Sn completely transformed into tri-dimensional network-like structure intermetallic compounds (IMCS) Cu 6 Sn 5 and Cu 3 Sn, the inner Cu cores were interconnected by the formed network-like Cu-Sn IMCS, with a high remelting temperature (415°C for Cu 6 Sn 5 and 676°C for Cu 3 Sn). With reflow time increased, more Cu 6 Sn 5 layer transformed into Cu 3 Sn, and voids increased with Cu atom diffusing to Cu 6 Sn 5 layer. Consequently, the joint with little Cu 3 Sn has the potential to fulfill the requirements of high temperature die attach. The surface morphology of the produced Cu@Sn microparticles and cross section morphology of the joint was characterized using scanning electron microscopy (SEM), X-ray diffraction (XRD) analysis was performed to investigate the structure and phases of Cu@Sn particles and the joint. The voids rate of the joint was studied by X-ray.

Proceedings ArticleDOI
01 Oct 2017
TL;DR: A genetic algorithm based converter system design procedure is presented with the feature of speed and universal and can better pack a high power density power converter.
Abstract: In this paper, a genetic algorithm based converter system design procedure is presented with the feature of speed and universal. This method can better pack a high power density power converter.

Journal ArticleDOI
01 Dec 2017
TL;DR: In this paper, a novel modeling approach for both PiN diode and IGBT is presented, which retains the distributed nature of charge dynamics in bipolar power devices, is solved directly by finite difference method in PSPICE.
Abstract: In this paper, a novel modeling approach for both PiN diode and IGBT is presented. In this model, the carrier diffusion equation, which retains the distributed nature of charge dynamics in bipolar power devices, is solved directly by finite difference method in PSPICE. The physical basis of this model and some practical considerations are introduced. Compared with conventional Fourier based IGBT model, the presented model keeps higher simulation speed and comparable high accuracy. These features were also verified by simulations and experiments.

Proceedings ArticleDOI
01 Oct 2017
TL;DR: An automatic layout design based on genetic algorithm for gate driver is developed and it can be extended to power circuit design, even power converter design easily.
Abstract: Inherent high switching frequency ability makes silicon carbide Metal-Oxide-Semiconductor Field-Effect transistor more sensitive to the parasitics and noise in the circuit. The layout of gate driver has a crucial influence on the parasitics, hereby the propagation delay and rise/fall time of the driving signal which is among the dominant factors to determine the switching performance of power device. In this paper, an automatic layout design based on genetic algorithm for gate driver is developed. Detailed description of the gate driver layout design is given. Experimental results verified the effectiveness of the design procedure. The speed and validity of the approach make it a valuable tool, and it can be extended to power circuit design, even power converter design easily.

Proceedings ArticleDOI
01 Mar 2017
TL;DR: In this article, a fast compact model based on finite differential method wtih PSPICE is presented, and a cooling system example was introduced and verified for high power density converter systems design.
Abstract: Improved from the conventional analytical thermal model, a fast compact model based on finite differential method wtih PSPICE is presented in this paper. The paper presents the physical basis and the practical consideration. Based on the model, a cooling system example was introduced and verified for high power density converter systems design.

Proceedings ArticleDOI
01 Oct 2017
TL;DR: This method can help to design a high power density power converter and it is suggested that a compact power module design and evaluation method is presented for EV application.
Abstract: In this paper, compact power module design and evaluation method is presented for EV application. This method can help to design a high power density power converter.

Patent
22 Dec 2017
TL;DR: In this article, a power converter layout method is presented, which comprises the following four steps of: 1, determining basic parts of power converter and a three-dimensional size of each basic part according to a variety and a topological structure of the power converter, and abstracting each basic parts into a cube; 2, determining connection relationships and connection point positions between the basic parts in the power converters; 3, carrying out optimal design on the integrated layout of the Power Converter; and 4, outputting an optimal design result of the layout.
Abstract: The invention discloses a power converter layout method. The method comprises the following four steps of: 1, determining basic parts of a power converter and a three-dimensional size of each basic part according to a variety and a topological structure of the power converter, and abstracting each basic part into a cube; 2, determining connection relationships and connection point positions between the basic parts in the power converter; 3, carrying out optimal design on the integrated layout of the power converter; and 4, outputting an optimal design result of the layout of the power converter.

Proceedings ArticleDOI
01 Aug 2017
TL;DR: In this paper, the authors analyzed the mechanism of the conducted EMI emission of a flyback converter and established the equivalent circuits of differential-and common-mode interference in the frequency domain.
Abstract: In the power electronic device and the electronic equipment installed in electric vehicles (EV), the flyback converter is most commonly used as the auxiliary power supply. The electromagnetic interference (EMI) emitted by a flyback converter can transmit directly through the power supply port to other power electronic devices powered by the same power supply system. In this paper, the mechanism of the conducted EMI emission of a flyback converter is analyzed. The equivalent circuits of differential- and common-mode interference are established in the frequency domain to realize the accurate prediction of the conducted disturbance of the flyback converter.

Proceedings ArticleDOI
01 Oct 2017
TL;DR: The equivalent circuits of differential- and common-mode interference are established in the frequency domain to realize the accurate prediction of the conducted disturbance of the flyback converter.
Abstract: In the power electronic device and the electronic equipment installed in electric vehicles (EV), the flyback converter is most commonly used as the auxiliary power supply. The electromagnetic interference (EMI) emitted by a flyback converter can transmit directly through the power supply port to other power electronic devices powered by the same power supply system. In this paper, the mechanism of the conducted EMI emission of a flyback converter is analyzed. The equivalent circuits of differential- and common-mode interference are established in the frequency domain to realize the accurate prediction of the conducted disturbance of the flyback converter.