A two-rank GaAs sample-and-hold (S/H) chip and four 250-MHz silicon digitizers form a 1-GHz 6-b analog-to-digital converter (ADC) system. The two rank S/H architecture avoids dynamic errors inherent to interleaved ADCs; accuracy exceeds 5.2 effective bits, up to 1-GHz input frequency. Special attention is paid to avoiding GaAs slow transient errors.

A 1-GHz 6-bit ADC system

The frequency dependence of PECVD nitride and LPCVD oxide metal-insulator-metal (MIM) capacitors is investigated with special attention for precision analog applications. At measurement frequencies of 1.0 MHz, nitride MIM capacitors show capacitance linearity close to that of oxide MIM capacitors, indicating potential for precision analog circuit applications. Due to dispersion effects, however, nitride MIM capacitors show significant degradation in capacitor linearity as the frequency is reduced, which leads to accuracy limitations for precision analog circuits. Oxide MIM capacitors are essentially independent of frequency.

Analog characteristics of metal-insulator-metal capacitors using PECVD nitride dielectrics

An apparatus is provided for the supply of passive electronic components to a chip containing circuitry capable of operating in a communications system. The invention provides a silicon interposer element chip package which includes a silicon substrate and which is capable of carrying one or more IC chips and which does not suffer semiconductor leeching problems. A silicon substrate is formed from a silicon layer and an insulating layer, preferably an oxide. The invention also provides passive circuits within the interposer element oxide layer. The interposer element is then bonded to an integrated circuit chip using flip-chip processing.

Silicon multi-chip module packaging with integrated passive components and method of making

The passivation of GaAs MESFETs with plasma-enhanced chemical-vapor-deposited (PECVD) silicon nitride films of both compressive and tensile stress is reported. Elastic stresses included in GaAs following nitride passivation can produce piezoelectric charge density, which results in a shift of MESFET characteristics. The shift of MESFET parameters due to passivation was found to be dependent on gate orientation. The experiments show that nitride of tensile stress is preferable for MESFETS with (011-bar) oriented gates. The shifts in V/sub TH/,I/sub DSS/, and G/sub M/ of the devices before and after nitride passivation are less than 5% if the nitride of appropriate stress states are used for passivation. The breakdown voltage of the MESFETs after nitride deposition was also studied. It is found that the process with higher hydrogen incorporation tends to reduce the surface oxide and increase the breakdown voltage after nitride deposition. In addition, the passivation of double-channel HEMTs is reported for the first time. >

Passivation of GaAs FET's with PECVD silicon nitride films of different stress states

Coaxial cables each having a cylindrical electrically conductive outer shield and a central conductive wire insulated from the shield are conductively coupled through a connector to coplanar conductors on a dielectric substrate. The conductors converge toward an opening in the substrate. The coplanar conductors alternately are ground and signal conductors. Each coaxial cable shield is conductively coupled to two ground conductors and the cable wire is conductively coupled to the signal conductor between the two ground conductors. At the substrate opening the ground and signal conductors are conductively coupled to planar stripline waveguide ground and signal blades, respectively. Ground blades between the signal blades are a factor in controlling the signal blade impedance and provide isolation between the signal blades. Each blade is perpendicular to the substrate and has a pitch angle such that the blade extends through the opening below the substrate. A wire or needle probe is conductively coupled to the blade distal end. The needle end is adapted to contact a conductive pad on an IC (integrated circuit) chip. The coplanar conductors and stripline blades are configured to maintain substantially constant characteristic impedance in the signal conductors and their respective blades and to isolate signals in the signal conductors and blades from one another.

Coplanar and stripline probe card apparatus

A process for manufacturing small-to-medium scale GaAs integrated circuits is described. Integrated FET's, diodes, resistors, thin-film capacitors, and inductors are used for monolithic integration of digital and analog circuits. Direct implantation of Si into > 105Ω.cm resistivity substrates produces n-layers with ± 10-percent sheet resistance variation. A planar fabrication process featuring retained anneal cap (SiO 2 ), proton isolation, recessed Mo-Au gates, silicon nitride passivation, and a dual-level metal system with polyimide intermetal dielectric is described. Automated on-wafer testing at frequencies up to 4 GHz is introduced, and a calculator-controlled frequency domain test system described. Circuit yields for six different circuit designs are reported, and process defect densities are inferred.

A manufacturing process for analog and digital gallium arsenide integrated circuits

A process for manufacturing small-to-medium scale GaAs integrated circuits is described. Integrated FET's, diodes, resistors, thin-film capacitors, and inductors are used for monolithic integration of digital and analog circuits. Direct implantation of Si into >10/sup 5/ omega/spl dot/cm resistivity substrates produces n-layers with +-10-percent sheet resistance variation. A planar fabrication process featuring retained anneal cap (SiO/sub 2/), proton isolation, recessed Mo-Au gates, silicon nitride passivation, and a dual-level metal system with polyimide intermetal dielectric is described. Automated on-wafer testing at frequencies up to 4 GHz is introduced, and a calculator-controlled frequency domain test system described. Circuit yields for six different circuit designs are reported, and process defect densities are inferred.

A Manufacturing Process for Analog and Digital Gallium Arsenide Integrated Circuits

A 26 GHz MMIC technology has been developed to manufacture high performance integrated circuits for microwave instrumentation. The fabrication process features an MBE active layer, a 0.4 mu m gate patterned by DUV contact lithography, Ta/sub 2/N thin-film resistors, Si/sub 3/N/sub 4/ MIM capacitors and dry-etched backside vias. The completed MESFET has a nominal f/sub t/ of 23 GHz and a f/sub max/ of 55 GHz. Two standard products are currently being manufactured. The first is a 2-26.5 GHz travelling wave amplifier (TWA) which routinely achieves 8.7 dB+or-0.5 dB gain across the band with 21 dBm saturated output power and a noise figure of better than 8 dB at 18 GHz. RF yield to a gain spec of 7 dB at 26.5 GHz and 10 dB input and output return loss is 40%. The second product is a DC-50 GHz variable attenuator which achieves 72% yield to a 26.5 GHz spec of 2.4 dB minimum insertion loss, 27 dB maximum attenuation and greater than 8 dB input and output return loss. >

R.A. Fisher

Papers

A manufacturing process for analog and digital gallium arsenide integrated circuits

A Manufacturing Process for Analog and Digital Gallium Arsenide Integrated Circuits

A manufacturable, 26 GHz GaAs MMIC technology