Learn the basic properties and designs of modern VLSI devices, as well as the factors affecting performance, with this thoroughly updated second edition. The first edition has been widely adopted as a standard textbook in microelectronics in many major US universities and worldwide. The internationally-renowned authors highlight the intricate interdependencies and subtle tradeoffs between various practically important device parameters, and also provide an in-depth discussion of device scaling and scaling limits of CMOS and bipolar devices. Equations and parameters provided are checked continuously against the reality of silicon data, making the book equally useful in practical transistor design and in the classroom. Every chapter has been updated to include the latest developments, such as MOSFET scale length theory, high-field transport model, and SiGe-base bipolar devices.

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Fundamentals of Modern VLSI Devices

This paper examines the apparent limits, possible extensions, and applications of CMOS technology in the nanometer regime. Starting from device scaling theory and current industry projections, we analyze the achievable performance and possible limits of CMOS technology from the point of view of device physics, device technology, and power consumption. Various possible extensions to the basic logic and memory devices are reviewed, with emphasis on novel devices that are structurally distinct front conventional bulk CMOS logic and memory devices. Possible applications of nanoscale CMOS are examined, with a view to better defining the likely capabilities of future microelectronic systems. This analysis covers both data processing applications and nondata processing applications such as RF and imaging. Finally, we speculate on the future of CMOS for the coming 15-20 years.

Nanoscale CMOS

In this paper, normal operation of a MOSFET with an ultra-thin direct-tunneling gate oxide is reported for the first time. These high current drive n-MOSFET's were fabricated with a 1.5 nm direct-tunneling gate oxide. They operate well at gate lengths of around 0.1 /spl mu/m, because the gate leakage current falls in proportional to the gate length, while the drain current increases in inverse proportion. A current drive of more than 1.0 mA//spl mu/m and a transconductance of more than 1,000 mS/mm were obtained at a gate length of 0.09 /spl mu/m at room temperature. These are the highest values ever obtained with Si MOSFET's at room temperature. Further, hot-carrier reliability is shown to improve as the thickness of the gate oxide is reduced, even in the 1.5 nm case. This work clarifies that excellent performance-a transconductance of over 1,000 mS/mm at room temperature-can be obtained with Si MOSFET's if a high-capacitance gate insulator is used.

1.5 nm direct-tunneling gate oxide Si MOSFET's

This paper presents an overview of technical challenges in achieving higher integration levels, lower power dissipation, smaller form factor, and lower cost in portable battery-powered RF transceivers for personal communications applications. Specific emphasis is placed on silicon integrated circuits for transceivers in the 800 MHz-2.5 GHz range of frequencies.

Future directions in silicon ICs for RF personal communications

Technologies now exist for implementing dense surface-normal optical interconnections for silicon CMOS VLSI using hybrid integration techniques. The critical factors in determining the performance of the resulting photonic chip are the yield on the transceiver device arrays, the sensitivity and power dissipation of the receiver and transmitter circuits, and the total optical power budget available. The use of GaAs-AlGaAs multiple-quantum-well p-i-n diodes for on-chip detection and modulation is one effective means of implementing the optoelectronic transceivers. We discuss a potential roadmap for the scaling of this hybrid optoelectronic VLSI technology as CMOS linewidths shrink and the characteristics of the hybrid optoelectronic transceiver technology improve. An important general conclusion is that, unlike electrical interconnects, such dense optical interconnections directly to an electronic circuit will likely be able to scale in capacity to match the improved performance of future CMOS technology.

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Scaling optoelectronic-VLSI circuits into the 21st century: a technology roadmap

We report a room temperature, 0.1 /spl mu/m CMOS technology on bulk Si substrates that delivers a record ring-oscillator gate delay of 11.8 psec at 2.5 V. Frequency dividers at 2.0 V operate with input frequencies exceeding 8.5 GHz. Feature sizes obey g-line lithography design rules except at the gate level. The high speed CMOS performance and the good subthreshold and drain characteristics for both NMOS and PMOS devices are obtained through the implementation of vertical doping engineering and the reduction of parasitics. >

Room temperature 0.1 /spl mu/m CMOS technology with 11.8 ps gate delay

A molecular beam epitaxial method of fabricating a semiconductor device is disclosed wherein the dopant is implanted by establishing a plasma containing ions of the dopant and the ions are coupled through a drift chamber to impinge on the growing substrate surface. The plasma formed in the ion gun has ions of boron and arsenic and therefore the dopants selected for implantation can be determined by setting a mass filter present in the ion gun. A change to the dopant of the opposite conductivity type can be accomplished in seconds by simply readjusting the mass filter in the ion gun.

Rapid alteration of ion implant dopant species to create regions of opposite conductivity

A plurality of semiconductor lasers (431-434) and a photodetector (120) are mounted on a silicon substrate (100) having an integrated circuit (101) fabricated therein. The integrated circuit includes a biasing circuit (405) for establishing a threshold current level that is dependent on the output of the photodetector and a modulator circuit (404) for providing a modulation current that is dependent on the digital values in an input signal. A semiconductor switch (406) selects only one of the plurality of semiconductor lasers for activation by the biasing and modulator circuits. The integrated circuit also includes a circuit (408) that operates the semiconductor switch so as to selectively activate a different one of the plurality of semiconductor lasers in response to either a predetermined output from said photodetector or in response to an external supervisory signal.

Semiconductor lasers with selective driving circuit

Signal distortion in fiber optic systems is compensated for by forming decisions as to the transmitted information as a joint function of the received signal and of a feedback signal. The latter, in turn, is a function of decisions made for at least one signal transmitted over the fiber. The feedback signal determines the value of a threshold to which the received signal is compared in order to generate the decisions.

Fiber optic transmission distortion compensation

An integrated array of pressure transducers capable of producing an analog output voltage representative of the applied pressure is proposed. The individual transducing elements (16) are defined by a three-layer structure including a thin layer of piezoelectric material (10) disposed between a reference potential plate (12) and a plurality of electrodes (15) contained in a silicon substrate (14). A force applied to a localized portion of the reference plate will cause a deflection of the piezoelectric material towards the electrodes on the substrate, inducing a capacitive charge on the electrode in the localized area. This capacitance is stores at a node A associated with the transducing element, and may be interrogated by a sensing circuit (18) located in the silicon substrate. Since the induced charge is directly proportional to the applied force, a measurement of the output voltage from node A will yield a direct indication of the localized force applied to the sensor.

R.G. Swartz

Papers

Room temperature 0.1 /spl mu/m CMOS technology with 11.8 ps gate delay

Rapid alteration of ion implant dopant species to create regions of opposite conductivity

Semiconductor lasers with selective driving circuit

Fiber optic transmission distortion compensation

Analog integrated circuit pressure sensor