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Richard J. Coyle

Researcher at Bell Labs

Publications -  51
Citations -  876

Richard J. Coyle is an academic researcher from Bell Labs. The author has contributed to research in topics: Temperature cycling & Soldering. The author has an hindex of 17, co-authored 47 publications receiving 772 citations. Previous affiliations of Richard J. Coyle include Alcatel-Lucent.

Papers
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Proceedings ArticleDOI

The influence of room temperature aging on ball shear strength and microstructure of area array solder balls

TL;DR: Solder ball shear strength is determined for ball grid array (BGA) packages in the as-received condition and after solder reflow preconditioning (exposure to multiple solder re-low profiles) as discussed by the authors.
Journal ArticleDOI

Thermal Fatigue Evaluation of Pb-Free Solder Joints: Results, Lessons Learned, and Future Trends

TL;DR: In this article, the results from Pb-free solder joint reliability programs sponsored by two industry consortia were discussed and the effect of initial microstructure and its evolution during accelerated thermal cycling test was investigated.
Journal ArticleDOI

Solder metallization interdiffusion in microelectronic interconnects

TL;DR: In this article, the growth of intermetallic compounds in Cu/Ni/Au/PbSn solder joints was investigated, and structural examinations using optical and electron microscopy of cross-sectioned solder joints revealed that Ni/sub 3/Sn/sub 4/ at the solder/Ni interface after reflow.
Proceedings ArticleDOI

Shear testing and failure mode analysis for evaluation of BGA ball attachment

TL;DR: In this paper, ball shear testing is performed in conjunction with thermal preconditioning to evaluate brittle fractures on a thermally enhanced BGA with electroless Ni/Au bond pads and on a plastic bGA with electrolytic Ni/AU bond pads.
Patent

Field programmable gate array assembly

TL;DR: A field programmable gate array assembly (FPGA) as mentioned in this paper offers the unique functionality typically reserved for custom ICs and application specific integrated circuits (ASICs) with the flexibility of a PGA array.