Showing papers by "Richard R. Brooks published in 2005"

Fusion of Threshold Rules for Target Detection in Sensor Networks

Abstract: We consider a network of sensors distributed in a target area providing environmental measurements that are subject to normally distributed, independent additive noise. Each sensor node applies a threshold rule to the measurements to decide the presence of a target; the distance to the target together with the threshold value determines its hit and false alarm probabilities or rates using a signal attenuation model. We propose a centralized threshold-OR fusion rule for combining the individual sensor node decisions. Under the statistical independence of sensor measurements, we derive fusion threshold bounds using Chebyshev’s inequality based on individual hit and false alarm probabilities but without requiring a priori knowledge of the underlying probability distributions. We derive conditions to ensure that the fused method achieves a higher hit rate and lower false alarm rate compared to the weighted averages of individual sensor parameters. The simulations using Monte Carlo method illustrate significant detection performance improvements of the proposed fusion approach.

A data-driven approach for embedded security

Abstract: As embedded systems are being used in a wide variety of critical applications, providing security to data stored and processed in these systems has become an important issue. However, providing security incurs performance and power overheads that need to be limited in resource-constrained embedded environments. Consequently, architectural support to limit these overheads to be incurred only while storing or processing vital data is desirable. In this paper, we present an architecture that provides selective encryption protection for storage and processing protection to power analysis attacks for data marked as requiring security. Further, we show how the code can be transformed to reduce the overhead associated with protecting secure data.

Symmetric encryption in reconfigurable and custom hardware

Abstract: Software implementations of many symmetric-key encryption algorithms are often inefficient. We study the AES algorithm and its optimised implementations in both software and hardware. Specifically, the performance of AES encryption in processor architectures is considered. Also, we study the performance of optimised AES implementations in Xilinx FPGAs and ASIC devices. We illustrate how modern processors are inadequate when implementing the AES algorithm in terms of performance and power consumption. By comparison, implementations of the AES encryption architectures in FPGAs demonstrate a performance improvement ranging from 50% to approximately 2000%. ASIC implementations are able to achieve even higher performance.

A compiler-based approach to data security

Abstract: With the proliferation of personal electronic devices and embedded systems, personal and financial data is more easily accessible. As a consequence, we also observe a proliferation of techniques that attempt to illegally access sensitive data without proper authorization. Due to the severe financial and social ramifications of such data leakage, the need for secure memory has become critical. However, working with secure memories can have performance, power, and code size overheads since accessing a secure memory involves additional overheads for encryption/decryption and/or password checks. In addition, an application code may need to be restructured to work under such a memory system. In this paper, we propose a compiler-directed strategy to generate code for a secure memory based embedded architecture. The idea is to let the programmer mark certain data elements, called the seed elements, as secure (i.e., need to be stored in secure memory), and let the compiler determine the remaining secure elements automatically. We also address the problem of code size increase due to our strategy. The experimental results obtained through simulations clearly show that the proposed approach is effective in reducing the total secure memory size. The results also indicate that it is possible to reduce the resulting code size increase by clustering accesses to secure memory.