This paper provides more insight into the operation of the charge sheet superjunction (CSSJ) proposed recently, whose specific on-resistance for a given breakdown voltage is even lower than that of a Superjunction (SJ). It is shown how the SJ and the CSSJ both evolve from a simple Gamma-shaped p+-n junction in which the heavily doped region surrounds the lightly doped region; the peak field in such a 2-D junction is less than that in a plane junction. The phenomena underlying the I- V and C -V characteristics of the CSSJ MOSFET are clarified with the help of charge and potential simulations. A simple analytical model is developed for the drain-source capacitance of the CSSJ MOSFET; the model is shown to apply to SJ MOSFET as well. It is argued that the insulator charges providing the charge sheet essential for CSSJ operation will not present the same reliability problems as those due to trapped charge in the gate insulator of small-signal MOSFETs; this is because the insulator field distribution in a CSSJ differs significantly from that in a small-signal MOSFET. The insight provided in this paper should build a strong motivation for the practical implementation of the new structure.

On the Charge Sheet Superjunction (CSSJ) MOSFET

An optimization theory is developed for the balanced symmetric superjunction with the interface isolator layer (I-SJ) in this paper. The theory includes two parts: the electric field calculation by the Taylor series method; the design formulas by the minimum specific on-resistance $R_{\mathrm{\scriptscriptstyle ON},\mathrm {min}}$ optimization. Based on the theory, a new I-SJ structure with a single cell is proposed, which shows the minimum $R_{{\mathrm{\scriptscriptstyle ON}}}$ among the superjunction (SJ) devices with the $1~\mu \text{m}$ shallow depths. $R_{\mathrm{\scriptscriptstyle ON}}$ of the new device is reduced by 53.5% compared with that of the conventional SJ lateral double diffused metal-oxide-semiconductor field effect transistor (LDMOS) and 67.6% with the conventional LDMOS under the same breakdown voltage $V_{B}$ of 658 V.

Optimization and New Structure of Superjunction With Isolator Layer

Superjunction

Theoretical and experimental analysis of a venting clip to reduce stray inductance in high‐power conversion applications

This paper concerns superjunctions which employ oxide layers for isolating n- and p-pillars and in terminating the device. In our earlier work, we pointed out that oxide fixed charges significantly reduce the breakdown voltage of such devices. In this paper, we discuss various techniques in compensating the effects of oxide fixed charge so as to design such a device having the minimum specific on-resistance for a given breakdown voltage. The techniques include doping modification and reduction in the widths of terminating pillars and nonconducting pillars in the on-state. We also analyze the relative contributions of oxide fixed charges and doping-related charge imbalance to breakdown reduction to highlight the significance of oxide fixed charges.

S. Balaji

Papers

Improving the Performance of Superjunction Devices Having Fixed Charge in Isolation and Termination Oxide Layers