An analytical model describing reverse and forward DC characteristics is presented. It serves as a basis for a compact model for circuit simulation purposes. The model is based on the solution of the hole continuity equation in the depletion layer of a p-n junction and incorporates the following physical mechanisms: band-to-band tunneling, trap-assisted tunneling (both under forward and reverse bias), Shockley-Read-Hall recombination, and avalanche breakdown. It contains seven parameters which can be determined at one temperature. No additional parameters are needed to describe the temperature dependence. From comparisons with both numerical simulations and measurements it is found that the model gives an adequate description of the DC characteristics in both forward and reverse modes. >

A new analytical diode model including tunneling and avalanche breakdown

An important aspect of the large expansion in the development and production of solid-state devices has been the demand for more sophisticated techniques for determining the electrical properties of semiconductors, especially silicon and the III-V compounds. A very wide range of measurement techniques now exists and it is the purpose of this article to review those techniques which are in widespread use or which show promise for future application, and at a time for continuing innovation in this area, to indicate present trends and material problems which may arise in the near future.

https://iopscience.iop.org/article/10.1088/0034-4885/41/2/001/pdf

The electrical characterisation of semiconductors

In lateral n+p−p+ diodes made in LPCVD polycrystalline silicon films, the energy distribution of the traps at the grain boundaries is found to be U shaped. They have a density of about 1012 cm−2 and a capture cross section of about 10−16 cm2. The forward current of the diodes is ascribed to recombination, the reverse current to field-enhanced generation via these traps.

Grain boundary states and the characteristics of lateral polysilicon diodes

Abstract The electron thermal emission and capture rates and the electron impact ionization rate of trapped electrons at the sulfur donor centers in the depletion region of reverse biased silicon p-n junctions have been measured by the dark capacitance and current transient methods. Least square fits of the low field data give the following electron thermal emission rates: en0t = 1.64 × 1010(T/300°K)2exp [−276/kT] sec for the neutral center and en−1t = 1.03 × 1012 (T/300°K)2 exp [−528/kT] sec for the singly ionized center where kT is in meV. The thermal activation energies are then 276 and 528 meV respectively. The hole emission rates are much smaller and not determined. The electric field dependences of the thermal emission rates of electrons are considerably smaller than that predicted by the Poole-Frenkel theory applied to the ground state: en0t increased by 1.5 at 130°K from 0.2 to 1.0 × 105 V/cm and en−1t by 3 at 200°K. Electron capture coefficients are obtained from capacitance transient during steady state electron injection into the junction depletion layer either by transistor emitter or by optical generation at the surface next to the junction. The electron capture rate at the doubly charged center, cn−2t, decreases from 5 × 10−7 cm3/sec at 3 × 104 V/cm to 10−7 cm3/sec at 1.0 × 105 V/cm with essentially no temperature dependence. The electron capture rate at the singly ionized centers, cn−1t, obtained at 82°K was about two orders of magnitude smaller than cn−2t but had essentially the same electric field dependence. The electron impact ionization rate of trapped electrons at the neutral centers and its electric field dependences were also determined at 82°K.

Emission and Capture of Electrons at Sulfur Centers in Silicon.

Publisher Summary The purpose of this chapter is to present a survey of noise in solid-state devices. This chapter also discusses the various noise sources and this is applied to p-n junction diodes, Schottky barrier diodes, tunnel diodes, Josephson junctions, bipolar transistors, junction field effect transistors (JFETs), and metal-oxide-semiconductor field effect transistors (MOSFETs) The most important sources of noise in solid-state devices are thermal noise, shot noise, generation-recombination (g-r) noise, and flicker noise. Moreover, for semiconductor material one encounters noise due to the generation and recombination of carriers. It shows up as fluctuations in the resistance of the sample that can be detected, in turn, by applying a voltage to the sample and measuring the fluctuating current. For simple cases, the noise can be described by one fluctuating number of carriers; either electrons or holes. This is true for the noise due to traps, deep-lying donors or acceptors, Shockley-Read-Hall centers when there is a predominant lifetime.

Noise in Solid State Devices

When sufficiently high voltage steps are used for driving a metal-oxide-semiconductor capacitor (MOSC) towards deep inversion, the temporal evolution of the current and of the high-frequency capacitance during the return to equilibrium cannot be interpreted on the basis of a theory assuming a constant bulk generation lifetime. A more general theory, which takes into account field-dependent carrier emission rates, is developed and it is shown how current and h.f. capacitance measurements can be used to determine the field dependence of the bulk generation lifetime. The results of experiments performed on differently processed MOSC's are presented; they support the hypothesis that field-enhancement of carrier emission rates takes place according to a mechanism of the Poole-Frenkel-type.

Field-enhanced carrier generation in MOS capacitors

In a reverse-biased p-n junction, the current component arising from carrier generation in the depletion layer has been up to now considered proportional to the depletion layer width W. As the junction capacitance varies inversely with W, the current-capacitance product should be constant with the applied voltage whenever the reverse current is essentially a generation current. There is experimental evidence, however, that this is not so. In the present paper it is shown that an important cause of such a discrepancy is the considerable difference existing between the depletion layer width and the width Wi of the region in which the generation function reaches its maximum value. In fact, the generation current is proportional to Wi rather than to W and the current-capacitance product must be expected to vary as the ratio W i W , which is all but constant with the applied voltage. A simple model is proposed for evaluation of the generation current effective width Wi, which has been explicitly computed as a function of the applied reverse voltage and of the doping profile in cases of abrupt and linearly-graded junctions.

A theoretical investigation on the generation current in silicon p-n junctions under reverse bias

By pulsing an MOS capacitor between inversion and accumulation, the minority carrier lifetime can be measured. The method is very neat in principle but one may “a priori” expect experimental results to be affected by errors due to several collateral phenomena, such as high-injection, recombination at the ohmic contact, lateral diffusion and surface-states trapping. In this paper the simple theory is presented and all these effects are thoroughly examined theoretically as well as experimentally. It is shown that the method proposed is reliable, provided some care is used in the interpretation of the results, which are not negligibly influenced by the charging and discharging of surface states.

Minority carrier recombination in MOS capacitors switched from inversion to accumulation

A numerical simulation of a silicon MOS capacitor pulsed from equilibrium into deep inversion has been performed with a view to accurately investigating the effects associated with surface states. A continuum of acceptor surface states has been assumed across the energy gap but, of course, the conclusions may be extended to the case of donor-like states. The results of the calculations show that soon after application of the voltage step a considerable portion of the trapped electrons is released from the upper half energy gap into the conduction band giving rise to a spike in the external current. The emission of these electrons is so rapid that it cannot be detected by the usual slow response current meter, nor is it able to induce any relevant variation into the depletion layer width and, consequently, into the high-frequency capacitance. At the same time, electrons trapped in the surface states disappear also through recombinations with holes generated in the bulk. During a time interval, which turns out to be small in comparison to the duration of the whole transient, every hole generated recombines at the surface giving rise to a small delay in the formation of the inversion layer. After that this latter begins to build up and surface states behave as if they were in a quasi-equilibrium condition with the valence band.

Effects of surface states on relaxation phenomena in MOS capacitors

A theoretical investigation of the transient behaviour of an m.o.s. capacitor pulsed into inversion shows that current and capacitance measurements provide a reliable method for the evaluation of the bulk generation lifetime, even in the presence of moderately nonuniform doping concentrations.

S. Graffi

Papers

Field-enhanced carrier generation in MOS capacitors

A theoretical investigation on the generation current in silicon p-n junctions under reverse bias

Minority carrier recombination in MOS capacitors switched from inversion to accumulation

Effects of surface states on relaxation phenomena in MOS capacitors

Effects of nonuniform doping on generation-lifetime measurement in m.o.s. capacitors