S.J. Ahn

TL;DR: In this article, a high-density 64Mbit PRAM was successfully fabricated using N-doped Ge/sub 2/Sb/Sub 2/Te/sub 5/ (GST) and optimal GST etching process, achieving low writing current of 0.6 mA and clear separation between SET and RESET resistance distributions.

TL;DR: In this paper, a ring-shaped contact structure was proposed to improve the contact area distribution even at the smallest contact diameter of 50nm node and the validity of this approach was directly confirmed by the evaluation of the functionality for the fabricated 256Mbit PRAM based on 0.10/spl mu/m CMOS technology.

TL;DR: In this article, a novel cell structure of PRAM with metal interlayer has been proposed to solve the over-programming fail. But the cell operation of this structure was not reliable.

TL;DR: In this paper, a chalcogenide memory element that can operate at low writing current has been developed for high-density phase-change random access memory, and the phase transition behaviors as a function of various process factors including contact size, cell size and thickness, doping concentration in chalgogenide material and cell structure have been investigated.

TL;DR: In this article, an advanced ring type and encapsulating scheme was developed to fabricate highly manufacturable and reliable 256Mb PRAM, in which core dielectrics were optimized for cell contact CMP process and relatively high set resistance was stabilized from encapsulating Ge2Sb2Te5 (GST) stack with blocking layers.