We present several new simple and accurate expressions for the DC inductance of square, hexagonal, octagonal, and circular spiral inductors. We evaluate the accuracy of our expressions, as well as several previously published inductance expressions, in two ways: by comparison with three-dimensional field solver predictions and by comparison with our own measurements, and also previously published measurements. Our simple expression matches the field solver inductance values typically within around 3%, about an order of magnitude better than the previously published expressions, which have typical errors ground 20% (or more). Comparison with measured values gives similar results: our expressions (and, indeed, the field solver results) match within around 5%, compared to errors of around 20% for the previously published expressions. (We believe most of the additional errors in the comparison to published measured values is due to the variety of experimental conditions under which the inductance was measured.) Our simple expressions are accurate enough for design and optimization of inductors or of circuits incorporating inductors. Indeed, since inductor tolerance is typically on the order of several percent, "more accurate" expressions are not really needed in practice.

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Simple accurate expressions for planar spiral inductances

A geometric program (GP) is a type of mathematical optimization problem characterized by objective and constraint functions that have a special form. Recently developed solution methods can solve even large-scale GPs extremely efficiently and reliably; at the same time a number of practical problems, particularly in circuit design, have been found to be equivalent to (or well approximated by) GPs. Putting these two together, we get effective solutions for the practical problems. The basic approach in GP modeling is to attempt to express a practical problem, such as an engineering analysis or design problem, in GP format. In the best case, this formulation is exact; when this is not possible, we settle for an approximate formulation. This tutorial paper collects together in one place the basic background material needed to do GP modeling. We start with the basic definitions and facts, and some methods used to transform problems into GP format. We show how to recognize functions and problems compatible with GP, and how to approximate functions or data in a form compatible with GP (when this is possible). We give some simple and representative examples, and also describe some common extensions of GP, along with methods for solving (or approximately solving) them.

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A tutorial on geometric programming

A new methodology for constructing convex optimization models called disciplined convex programming is introduced. The methodology enforces a set of conventions upon the models constructed, in turn allowing much of the work required to analyze and solve the models to be automated.

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Disciplined Convex Programming

Due to the unprecedented growth in wireless applications over the past decade, development of low-cost solutions for RF and microwave communication systems has become of great importance. This practical new book is the first comprehensive treatment of lumped elements, which are playing a critical role in the development of the circuits that make these cost-effective systems possible. The books offers you an in-depth understanding of the different types of RF and microwave circuit elements, including inductors, capacitors, resistors, transformers, via holes, airbridges, and crossovers. Supported with over 220 equations and more than 200 illustrations, it covers the practical aspects of each element in exceptional detail. No other single volume treats this subject matter in such depth. From materials, fabrication, and analyses - to design, modeling, and physical, electrical, and thermal applications, this unique resource offers you complete coverage of the critical topics you need understand for your work in the field. Offering the most comprehensive, up-to-date body of knowledge on lumped elements, the book is an indispensable professional reference and serves as an excellent text for senior undergraduate and graduate-level courses in RF and microwave circuit design.

Lumped Elements for RF and Microwave Circuits

CVXGEN is a software tool that takes a high level description of a convex optimization problem family, and automatically generates custom C code that compiles into a reliable, high speed solver for the problem family. The current implementation targets problem families that can be transformed, using disciplined convex programming techniques, to convex quadratic programs of modest size. CVXGEN generates simple, flat, library-free code suitable for embedding in real-time applications. The generated code is almost branch free, and so has highly predictable run-time behavior. The combination of regularization (both static and dynamic) and iterative refinement in the search direction computation yields reliable performance, even with poor quality data. In this paper we describe how CVXGEN is implemented, and give some results on the speed and reliability of the automatically generated solvers.

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CVXGEN: a code generator for embedded convex optimization

We present a technique for enhancing the bandwidth of gigahertz broad-band circuitry by using optimized on-chip spiral inductors as shunt-peaking elements. The series resistance of the on-chip inductor is incorporated as part of the load resistance to permit a large inductance to be realized with minimum area and capacitance. Simple, accurate inductance expressions are used in a lumped circuit inductor model to allow the passive and active components in the circuit to be simultaneously optimized. A quick and efficient global optimization method, based on geometric programming, is discussed. The bandwidth extension technique is applied in the implementation of a 2.125-Gbaud preamplifier that employs a common-gate input stage followed by a cascoded common-source stage. On-chip shunt peaking is introduced at the dominant pole to improve the overall system performance, including a 40% increase in the transimpedance. This implementation achieves a 1.6-k/spl Omega/ transimpedance and a 0.6-/spl mu/A input-referred current noise, while operating with a photodiode capacitance of 0.6 pF. A fully differential topology ensures good substrate and supply noise immunity. The amplifier, implemented in a triple-metal, single-poly, 14-GHz f/sub Tmax/, 0.5-/spl mu/m CMOS process, dissipates 225 mW, of which 110 mW is consumed by the 50-/spl Omega/ output driver stage. The optimized on-chip inductors consume only 15% of the total area of 0.6 mm/sup 2/.

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Bandwidth extension in CMOS with optimized on-chip inductors

We present an efficient method for optimal design and synthesis of CMOS inductors for use in RF circuits. This method uses the the physical dimensions of the inductor as the design parameters and handles a variety of specifications including fixed value of inductance, minimum self-resonant frequency, minimum quality factor, etc. Geometric constraints that can be handled include maximum and minimum values for every design parameter and a limit on total area. Our method is based on formulating the design problem as a special type of optimization problem called geometric programming, for which powerful efficient interior-point methods have recently been developed. This allows us to solve the inductor synthesis problem globally and extremely efficiently. Also, we can rapidly compute globally optimal trade-off curves between competing objectives such as quality factor and total inductor area. We have fabricated a number of inductors designed by the method, and found good agreement between the experimental data and the specifications predicted by our method.

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Optimization of inductor circuits via geometric programming

A method is described that involves retrieving a generic layout description of a circuit structure from a first database that stores a plurality of generic layout descriptions. The method also involves retrieving a foundry design rule profile of a semiconductor manufacturing process from a second database that stores a plurality of semiconductor manufacturing process design rule profiles. The method also involves automatically generating a layout of the circuit structure that conforms to the foundry design rule profile.

Method and apparatus for automatic layout of circuit structures

We present a scalable analytical model for on-chip transformers that is suitable for design optimization and circuit simulation. We also provide simple and accurate expressions for evaluating the self inductance and the mutual coupling coefficient (k). The model agrees very well with measurements for a variety of transformer configurations.

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S.S. Mohan

Papers

Simple accurate expressions for planar spiral inductances

Bandwidth extension in CMOS with optimized on-chip inductors

Optimization of inductor circuits via geometric programming

Method and apparatus for automatic layout of circuit structures

Modeling and characterization of on-chip transformers