Showing papers by "Santonu Sarkar published in 2016"

Internet of Things—robustness and reliability

Abstract: Internet of Things (IoT) has a disruptive impact on variety of application domains like healthcare, logistics, transportation, etc., where network-enabled embedded devices work proactively and collaboratively to solve a complex decision-making problem in real time. Many of these applications are business critical, and require the underlying technology to be dependable, that is, it must deliver its service even in the presence of failures. In this chapter we discuss the notion of reliability and recovery oriented systems in general and then explain why this is important for an IoT-based system. We discuss various failure scenarios and reliability challenges that exist at different layers of an IoT-based system. Next, we discuss various failure-prevention and fault-tolerance approaches to make an IoT-based system robust. Energy consumption by IoT devices plays a major role in the overall system reliability. In this chapter we discuss various reliability challenges due to the low-power devices and solutions that have emerged to improve the overall reliability of such devices and the whole system.

How Long Will This Live? Discovering the Lifespans of Software Engineering Ideas

Abstract: We all want to be associated with long lasting ideas; as originators, or at least, expositors. For a tyro researcher or a seasoned veteran, knowing how long an idea will remain interesting in the community is critical in choosing and pursuing research threads. In the physical sciences, the notion of half-life is often evoked to quantify decaying intensity. In this paper, we study a corpus of 19,000+ papers written by 21,000+ authors across 16 software engineering publication venues from 1975 to 2010, to empirically determine the half-life of software engineering research topics. In the absence of any consistent and well-accepted methodology for associating research topics to a publication, we have used natural language processing techniques to semi-automatically identify and associate a set of topics with a paper. We adapted measures of half-life already existing in the bibliometric context for our study, and also defined a new measure based on publication and citation counts. We find evidence that some of the identified research topics show a mean half-life of close to 15 years, and there are topics with sustaining interest in the community. We report the methodology of our study in this paper, as well as the implications and utility of our results.

Identification of critical parameters for MapReduce energy efficiency using statistical Design of Experiments

Abstract: Energy efficiency is an important concern for data centers today. Most of these data centers use MapReduce frameworks for big data processing. These frameworks and modern hardware provide the flexibility in form of parameters to manage the performance and energy consumption of system. However tuning these parameters such that it reduces energy consumption without impacting performance is challenging since - 1) there are a large number of parameters across the layers of frameworks, 2) impact of the parameters differ based on the workload characteristics, 3) the same parameter may have conflicting impacts on performance and energy and 4) parameters may have interaction effects. To streamline the parameter tuning, we present the systematic design of experiments to study the effects of different parameters on performance and energy consumption with a view to identify the most influential ones quickly and efficiently. The final goal is to use the identified parameters to build predictive models for tuning the environment. We perform a detailed analysis of the main and interaction effects of rationally selected parameters on performance and energy consumption for typical MapReduce workloads. Based on a relatively small number of experiments, we ascertain that replication-factor has highest impact and, surprisingly compression has least impact on the energy efficiency of MapReduce systems. Furthermore, from the results of factorial design we infer that the two-way interactions between block-size, Map-slots, and CPU-frequency, parameters of Hadoop platform have a high impact on energy efficiency of all types of workloads due to the distributed, parallel, pipe-lined design.

CPU Frequency Tuning to Improve Energy Efficiency of MapReduce Systems

Abstract: Energy efficiency is a major concern in today's data centers that house large scale distributed processing systems such as data parallel MapReduce clusters. Modern power aware systems utilize the dynamic voltage and frequency scaling mechanism available in processors to manage the energy consumption. In this paper, we initially characterize the energy efficiency of MapReduce jobs with respect to built-in power governors. Our analysis indicates that while a built-in power governor provides the best energy efficiency for a job that is CPU as well as IO intensive, a common CPU-frequency across the cluster provides best the energy efficiency for other types of jobs. In order to identify this optimal frequency setting, we derive energy and performance models for MapReduce jobs on a HPC cluster and validate these models experimentally on different platforms. We demonstrate how these models can be used to improve energy efficiency of the machine learning MapReduce applications running on the Yarn platform. The execution of jobs at their optimal frequencies improves the energy efficiency by average 25% over the default governor setting. In case of mixed workloads, the energy efficiency improves by up to 10% when we use an optimal CPU-frequency across the cluster.

Unified power and energy measurement API for HPC co-processors

Abstract: Power and energy optimization of applications running on a High Performance Computing infrastructure is an important research area in today's HPC driven world. Considerable amount of investments are being made for the same, emphasizing on the importance of such a research. The above mentioned optimization is a two step process. First, one must measure and analyze the power consumption accurately and then optimize the application by modifying the relevant sections of the application software responsible for it. In this paper we propose an API, called the Unified Power Profiling API (UPPAPI), which allows a parallel application developer to measure the power and energy consumed by the heterogeneous system during the application execution. The first important feature of this API is the abstraction created over different co-processors. Second, we have incorporated a corrective power model to remove the discrepancy arising out of the on-board GPU sensors. We illustrate the working of the above mentioned tool using Rodinia and SHOC Benchmarks. We further verify the correctness of the API generated measurement by comparing the results returned by the API with the actual power measured with a Krykard ALM10 power analyzer. This paper is an early attempt to develop a well rounded software tool, which enables the developer to optimize the resource usage and create efficient applications.

Data-race detection: the missing piece for an end-to-end semantic equivalence checker for parallelizing transformations of array-intensive programs

Abstract: The parallelizing transformation (hand-crafted or compiler-assisted) is error prone as it is often performed without verifying any semantic equivalence with the sequential counterpart. Even when the parallel program can be proved to be semantically equivalent with its corresponding sequential program, detecting data-race conditions in the parallel program remains a challenge. In this paper, we propose a formal verification approach that can detect data-race conditions while verifying the computational semantic equivalence of parallelizing loop transformations. We propose a coloured array data dependence graph (C-ADDG) based modeling of a program for verification of program equivalence as well as data-race condition detection across parallel loops. We have tested our tool on a set of Rodinia and PLuTo+ benchmarks and shown that our method is sound, whereby the method does not produce any false-positive program equivalence or data-race condition.

Developer Productivity in HPC Application Development: An Overview of Recent Techniques

Abstract: Increasing computing power with evolving hardware architectures has lead to change in programming paradigm from serial to parallel. Unlike the sequential counterpart, application building for High Performance Computing (HPC) is extremely challenging for developers. In order to improve the programmer productivity, it is necessary to address the challenges such as: i) How to abstract the hardware and low level complexities to make programming easier? ii) What features should a design assistance tool have to simplify application development? iii) How should the programming languages be enhanced for HPC? iv) What sort of prediction techniques can be developed to assist programmers to predict potential speedup? v) Can refactoring techniques solve the issue of parallelizing existing serial code? In this talk we make an attempt to present a landscape of the existing approaches to assist the software building process in HPC from a developer's point of view, and highlight some important research questions. We also discuss the state of practice in the industry and some of the application specific tools developed for HPC.