コンピュータ・サイエンス : ACM computing surveys

Learning and then recognizing a route, whether travelled during the day or at night, in clear or inclement weather, and in summer or winter is a challenging task for state of the art algorithms in computer vision and robotics. In this paper, we present a new approach to visual navigation under changing conditions dubbed SeqSLAM. Instead of calculating the single location most likely given a current image, our approach calculates the best candidate matching location within every local navigation sequence. Localization is then achieved by recognizing coherent sequences of these “local best matches”. This approach removes the need for global matching performance by the vision front-end - instead it must only pick the best match within any short sequence of images. The approach is applicable over environment changes that render traditional feature-based techniques ineffective. Using two car-mounted camera datasets we demonstrate the effectiveness of the algorithm and compare it to one of the most successful feature-based SLAM algorithms, FAB-MAP. The perceptual change in the datasets is extreme; repeated traverses through environments during the day and then in the middle of the night, at times separated by months or years and in opposite seasons, and in clear weather and extremely heavy rain. While the feature-based method fails, the sequence-based algorithm is able to match trajectory segments at 100% precision with recall rates of up to 60%.

SeqSLAM : visual route-based navigation for sunny summer days and stormy winter nights

In this paper, we discuss scheduling problems in semiconductor manufacturing. Starting from describing the manufacturing process, we identify typical scheduling problems found in semiconductor manufacturing systems. We describe batch scheduling problems, parallel machine scheduling problems, job shop scheduling problems, scheduling problems with auxiliary resources, multiple orders per job scheduling problems, and scheduling problems related to cluster tools. We also present important solution techniques that are used to solve these scheduling problems by means of specific examples, and report on known implementations. Finally, we summarize some of the challenges in scheduling semiconductor manufacturing operations.

A survey of problems, solution techniques, and future challenges in scheduling semiconductor manufacturing operations

Equations of State • From molecular considerations, identify which intermolecular interactions are significant (including estimating relative strengths of dipole moments, polarizability, etc.) • Apply simple rules for calculating P, v, or T ◦ Calculate P, v, or T from non-ideal equations of state (cubic equations, the virial equation, compressibility charts, and ThermoSolver) ◦ Apply the Rackett equation, the thermal expansion coefficient, and the isothermal compressibility to find v for liquids and solids • State the molecular components that contribute to internal energy • Relate macroscopic thermodynamic properties/behaviors with their molecular origins, including point charges, dipoles, induced dipoles, dispersion interactions, repulsive forces, and chemical effects • Define van der Waals forces and relate it to the dipole moment and polarizability of a molecule • Define a potential function • Write equations for ideal gas, hard sphere, Sutherland, and Lennard-Jones potentials and relate them to intermolecular interactions • Explain the origin of an use "complex" equations of state ◦ State the molecular assumptions of the ideal gas law ◦ Explain how the terms in the van der Waals equation relax these assumptions ◦ Describe how cubic equations of state account for attractive and repulsive interactions ◦ State and use the principle of corresponding states to develop expressions for the critical property data of a species ◦ Describe the purpose of the acentric factor and its role in the construction of compressibility charts • Adapt our approach to mixtures ◦ Write the van der Waals mixing rules and explain their functionality in terms of molecular interactions ◦ Write the mixing rules for the virial coefficients and for pseudo-critical properties using Kay's rule ◦ Using mixing rules to solve for P, v, and T of mixtures • Write the exact differential of one property in terms of two other properties • Use departure functions to calculate property data for real fluids (and use them to solve engineering problems) ◦ Calculate departure functions from Lee-Kesler charts ◦ Use equations of state to calculate departure functions

Equations of State

State of the art in simulation-based optimisation for maintenance systems

Optical on-chip data transmission enabled by silicon photonics (SiP) is widely considered a key technology to overcome the bandwidth and energy limitations of electrical interconnects. The possibility of integrating optical links into the on-chip communication fabric has opened up a fascinating new research field—Optical Networks-on-Chip (ONoCs)—which has been gaining large interest by the community. SiP devices and materials, however, are still evolving, and dealing with optical data transmission on chip makes designers and researchers face a whole new set of obstacles and challenges. Designing efficient ONoCs is a challenging task and requires a detailed knowledge from on-chip traffic demands and patterns down to the physical layout and implications of integrating both electronic and photonic devices. In this paper, we provide an exhaustive review of recently proposed ONoC architectures, discuss their strengths and weaknesses, and outline active research areas. Moreover, we discuss recent research efforts in key enabling technologies, such as on-chip and adaptive laser sources, automatic synthesis tools, and ring heating techniques, which are essential to enable a widespread commercial adoption of ONoCs in the future.

A Survey on Optical Network-on-Chip Architectures

Optical on-chip communication is considered a promising candidate to overcome latency and energy bottlenecks of electrical interconnects. Although recently proposed hybrid Networks-on-chip (NoCs), which implement both electrical and optical links, improve power efficiency, they often fail to combine these two interconnect technologies efficiently and suffer from considerable laser power overheads caused by high-bandwidth optical links. We argue that these overheads can be avoided by inserting a higher quantity of low-bandwidth optical links in a topology, as this yields lower optical loss and in turn laser power. Moreover, when optimally combined with electrical links for short distances, this can be done without trading off latency. We present the effectiveness of this concept with Lego, our hybrid, mesh-based NoC that provides high power efficiency by utilizing electrical links for local traffic, and low-bandwidth optical links for long distances. Electrical links are placed systematically to outweigh the serialization delay introduced by the optical links, simplify router microarchitecture, and allow to save optical resources. Our routing algorithm always chooses the link that offers the lowest latency and energy. Compared to state-of-the-art proposals, Lego increases throughput-per-watt by at least 40%, and lowers latency by 35% on average for synthetic traffic. On SPLASH-2/PARSEC workloads, Lego improves power efficiency by at least 37% (up to 3.5x).

/pdf/designing-low-power-low-latency-networks-on-chip-by-1erlfsx91j.pdf

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

Increasing fault rates in current and future technology nodes coupled with on-chip components in the hundreds calls for robust and fault-tolerant Network-on-Chip (NoC) designs. Given the central role of NoCs in today’s many-core chips, permanent faults impeding their original functionality may significantly influence performance, energy consumption, and correct operation of the entire system. As a result, fault-tolerant NoC design gained much attention in recent years. In this article, we review the vast research efforts regarding a NoC’s components, namely, topology, routing algorithm, router microarchitecture, as well as system-level approaches combined with reconfiguration; discuss the proposed architectures; and identify outstanding research questions.

https://dl.acm.org/doi/pdf/10.1145/2886781

A Survey on Design Approaches to Circumvent Permanent Faults in Networks-on-Chip

Just-in-time and just-in-sequence (JIS) concepts have been presented by the automotive industries in the past years. Today, where customer-oriented manufacturing is more and more demanded, electronics production is in a similar situation. The integral organizational means at Diehl AKO Nuremberg have been realized to achieve JIS material supply in the electronics sector. The right cooperation of software solutions from SAP (ERP), LES (logistics) to BOFOS (manufacturing planning) results in a set of improvements in material flow, scheduling, and document flow. The following paper shows the concepts, realizations, and achievements of the partners Diehl AKO and ETL. The main interest lies on the general approach, not on a particular detail.

Just-in-sequence material supply—a simulation based solution in electronics production

Optical networks-on-chip constitute a promising approach to tackle the power wall problem present in large-scale circuit design. In this paper, we propose Amon, an all-optical, mesh-like design based on passive microrings and wave-length division multiplexing, including the switch architecture and a contention-free routing algorithm. Amon provides power efficiency by decreasing the number of microrings, wavelengths and path lengths, which, in turn, reduces ring heater and laser power, and the required area. An analytic comparison of Amon against the state-of-the-art, low power, ring-based designs QuT and Spidergon shows that Amon significantly reduces network diameter and number of microrings. Our experimental results using DSENT show that Amon provides better scalability up to 256 nodes, significant power and area savings of up to 68% and 21%, respectively, while imposing only low wiring overhead and design complexity. Finally, Amon provides a tile-based structure which should facilitate VLSI integration.

/pdf/amon-an-advanced-mesh-like-optical-noc-48387g450b.pdf

Sebastian Werner

Papers

A Survey on Optical Network-on-Chip Architectures

Designing Low-Power, Low-Latency Networks-on-Chip by Optimally Combining Electrical and Optical Links

A Survey on Design Approaches to Circumvent Permanent Faults in Networks-on-Chip

Just-in-sequence material supply—a simulation based solution in electronics production

Amon: An Advanced Mesh-like Optical NoC