S
Shang-Chih Chen
Researcher at TSMC
Publications - 5
Citations - 153
Shang-Chih Chen is an academic researcher from TSMC. The author has contributed to research in topics: High-κ dielectric & Gate dielectric. The author has an hindex of 4, co-authored 5 publications receiving 153 citations.
Papers
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Patent
High-K gate dielectric stack with buffer layer to improve threshold voltage characteristics
TL;DR: In this paper, a high-K gate dielectric stack for a MOSFET gate structure to reduce Voltage threshold (Vth) shifts and method for forming the same was presented.
Patent
Ultra-shallow junction MOSFET having a high-k gate dielectric and in-situ doped selective epitaxy source/drain extensions and a method of making same
TL;DR: In this article, a gate having a high-k gate dielectric on a substrate and a gate electrode on the gate's surface protruding beyond the gate electrode is described.
Patent
Semiconductor device with high-k gate dielectric
Chun-Chieh Lin,Wen-Chin Lee,Chenming Hu,Shang-Chih Chen,Chih-Hao Wang,Fu-Liaog Yang,Ye-Chia Yeng +6 more
TL;DR: In this paper, the first transistor has a first gate dielectric portion located between the first gate electrode and the substrate, and the second gate has a second equivalent silicon oxide thickness.
Patent
Methods of forming semiconductor devices with high-k gate dielectric
Chun-Chieh Lin,Wen-Chin Lee,Chenming Hu,Shang-Chih Chen,Chih-Hao Wang,Fu-Liaog Yang,Yee-Chia Yeo +6 more
TL;DR: In this paper, a method of fabricating an integrated circuit is provided, where a first gate dielectric portion is formed on a substrate in a first transistor region, followed by a second-stage transistor region in a second transistor region.