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Yee-Chia Yeo
Researcher at National University of Singapore
Publications - 592
Citations - 12467
Yee-Chia Yeo is an academic researcher from National University of Singapore. The author has contributed to research in topics: Field-effect transistor & Transistor. The author has an hindex of 53, co-authored 592 publications receiving 11858 citations. Previous affiliations of Yee-Chia Yeo include Agency for Science, Technology and Research & TSMC.
Papers
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Proceedings ArticleDOI
5nm-gate nanowire FinFET
Fu-Liang Yang,Di-Hong Lee,Hou-Yu Chen,Chang-Yun Chang,Sheng-Da Liu,Cheng-Chuan Huang,Tang-Xuan Chung,Hung-Wei Chen,Chien-Chao Huang,Yi-Hsuan Liu,C.C. Wu,Chi-Chun Chen,Shih-Chang Chen,Ying-Tsung Chen,Ying-Ho Chen,C.H. Chen,Bor-Wen Chan,Peng-Fu Hsu,Jyu-Horng Shieh,Han-Jan Tao,Yee-Chia Yeo,Yiming Li,Jam-Wem Lee,Pu Chen,Mong-Song Liang,Chenming Hu +25 more
TL;DR: In this paper, a new nanowire FinFET structure was developed for CMOS device scaling into the sub-10 nm regime, and gate delay of 0.22 and 0.48 ps with excellent sub-threshold characteristics were achieved with very low off leakage cur-rent less than 10 nA/ /spl mu/m.
Journal ArticleDOI
Electronic band structures and effective-mass parameters of wurtzite GaN and InN
TL;DR: In this article, the electronic band structures of wurtzite GaN and InN are calculated by the empirical pseudopotential method (EPM) with the form factors adjusted to reproduce band features which agree with recent experimental data and accurate first-principles calculations.
Patent
Structure and method of a strained channel transistor and a second semiconductor component in an integrated circuit
TL;DR: In this article, the first and second active regions of a semiconductor chip are disposed by a resistor and a doped region between two terminals, and a strained channel transistor is formed in the second active region.
Proceedings ArticleDOI
25 nm CMOS Omega FETs
Fu-Liang Yang,Hao-Yu Chen,Fang-Cheng Chen,Cheng-Chuan Huang,Chang-Yun Chang,Chiu Hsien-Kuang,Chi-Chuang Lee,Chi-Chun Chen,Huan-Tsung Huang,C.H. Chen,Hun-Jan Tao,Yee-Chia Yeo,Mong-Song Liang,Chenming Hu +13 more
TL;DR: In this paper, low leakage and low active power 25 nm gate length C-MOSFETs are demonstrated for the first time with a newly proposed Omega-(/spl Omega/) shaped structure, at a conservative 17-19 /spl Aring/ gate oxide thickness, and with excellent hot carrier immunity.
Journal ArticleDOI
Tunneling Field-Effect Transistor: Capacitance Components and Modeling
TL;DR: In this paper, a numerical simulation study of gate capacitance components in a tunneling field effect transistor (TFET) was performed, showing key differences in the partitioning of gate capacitor between the source and drain as compared with a MOSFET.