Development of high-temperature solders: Review

A review of radio frequency microelectromechanical systems (RF MEMS) technology, from the perspective of its enabling technologies (e.g. fabrication, RF micromachined components and actuation mechanisms) is presented. A unique roadmap is given that shows how enabling technologies, RF MEMS components, RF MEMS circuits and RF microsystems packaging are linked together; leading towards enhanced integrated subsystems. An overview of the associated fabrication technologies is given, in order to distinguish between the two distinct classes of RF microsystems' component technologies; non-MEMS micromachined and true MEMS. An extensive literature survey has been undertaken and key papers have been cited; from these, the motivations behind different RF MEMS technologies are highlighted. The importance of understanding the limitations for realising new and innovative ideas in RF MEMS is discussed. Finally, conclusions are drawn as to where future RF MEMS technology may lead. It is likely that the switch will continue to be the most important RF MEMS component, with future work investigating its enhanced functionality, subsystem integration and volume production. The focus of RF MEMS circuits will shift from the digital phase shifter to high-Q tuneable filters.

Review of radio frequency microelectromechanical systems technology

A ground plane aperture technique is developed for effective enhancement of the capacitive coupling factor in a parallel-coupled microstrip line (PCML). By applying a so-called 'short-open calibration' (SOC) scheme in the fullwave method of moments (MoM) algorithm, this PCML with two external lines is characterised by an equivalent J-inverter network with its susceptance and two electrical line lengths. Extracted parameters indicate that the coupling factor appears to be frequency-dependent and its maximum value rises rapidly as the aperture is widened. With the introduction of a single microstrip line section between two identical PCMLs, a broadband and compact multi-pole microstrip bandpass filter is proposed for the first time, and its electrical behaviour is studied and optimised on the basis of its equivalent circuit network. The network-based optimised results are confirmed by an EM simulation of the entire filter layout, featuring ultra-broadband and four-pole bandpass behaviour. Further, a single capacitively loaded line section is utilised to formulate a multi-pole bandpass filter, and its electrical effects are also discussed for filter design. The predicted and measured results confirm attractive properties of the proposed multi-pole filter with BW=60%. |S/sub 11/|<-16 dB and 220% wide upper stop-band.

Broadband and compact multi-pole microstrip bandpass filters using ground plane aperture technique

A wireless interface by inductive coupling achieves aggregated data rate of 195 Gb/s with power dissipation of 1.2W among 4-stacked chips in a package where 195 transceivers with the data rate of 1 Gb/s/channel are arranged in 50-/spl mu/m pitch in 0.25-/spl mu/m CMOS technology. By thinning chip thickness to 10/spl mu/m, the interface communicates at distance of 15 /spl mu/m at minimum and 43 /spl mu/m at maximum. A low-power single-end transmitter achieves 55% power reduction for multiple connections. The transmit power is dynamically controlled in accordance with communication distance to reduce not only power dissipation but also crosstalk.

A 195-gb/s 1.2-W inductive inter-chip wireless superconnect with transmit power control scheme for 3-D-stacked system in a package

This paper presents a simple and effective technique which compensates for the amplitude and phase differences of the Marchand balun. Compensation is accomplished by interconnecting a short transmission line to a pair of couplers. As a result, Marchand balun with operation frequency ranging as wide as 8.2-30 GHz is achieved. To fabricate the prototype, we adopt three-dimensional monolithic-microwave integrated-circuit technology together with a 2.5 /spl mu/m/spl times/4 layer polyimide structure stacked over a GaAs wafer. The topology yields a circuit area as small as 0.2 mm/spl times/0.4 mm for the balun.

Compact and broad-band three-dimensional MMIC balun

A novel passive circuit technology of a three-dimensional (3-D) metal-insulator structure is developed for ultra-compact MMICs. By combining vertical passive elements, such as a wall-like microwire for shielding or coupling, and a pillar-like via connection with multilayer passive circuits, a 3-D passive circuit structure is formed to implement highly dense and more functional MMICs. O/sub 2//He RIE for forming trenches and holes in a thick polyimide insulator, low-current electroplating for forming gold metal sidewalls in the trenches or holes, and ion-milling with a WSiN stopper layer for patterning the gold metal are used to produce such a structure. The complete 3-D structure provides miniature microstrip lines effectively shielded with a vertical metal-wall, a miniature balun with low-loss vertical wall-like microwires, and inverted microstrip lines jointed with pillar-like vias through a thick polyimide layer. This technology stages next-generation ultra-compact MMICs by producing various functional passive circuits in a very small area.

Three-dimensional passive circuit technology for ultra-compact MMICs

This letter describes the successful fabrication of a 095Sn−005Au solder microbump on a compound semiconductor wafer by reflowing of multi-layer metal film Since the inherent interdiffusion in Au−Sn phases results in the alloying of multi-layer films, the composition of micro-bump is well controlled by the thickness of constituent metal films The micro-bumps melt at about 220 C, which is close to the lowest eutectic temperature in a Au−Sn system Solder bonding using 095Sn−005Au micro-bump is a very useful technique for the flipchip bonding of compound semiconductor devices

Fabrication of 0.95Sn−0.05Au solder micro-bumps for flip-chip bonding

A novel lead-free flip-chip technology for mounting high-speed compound semiconductor ICs, which have a relatively severe limitation regarding high-heat treatment, is presented. Solder bump interconnections of 0.95Sn-0.05Au were successfully fabricated by reflowing multilayer metal film at as low a temperature as 220/spl deg/C. The bumps were designed to have a diameter of 36 /spl mu/m with a gap between the chip and the motherboard of 24 /spl mu/m. The electrical characteristics of flip-chip-mounted coplanar waveguide chips were measured. The deterioration in reflection loss in the flip chip mounting was less than 3 dB for frequencies up to W-band.

Novel flip-chip bonding technology for W-band interconnections using alternate lead-free solder bumps

A novel passive circuit technology of a three-dimensional (3D) metal-insulator structure has been developed for ultra-compact MMICs. By combining vertical passive elements, such as a wall-like microwire for shielding or coupling and a pillar-like via connection, with multilayer passive circuits, highly dense and more functional MMICs can be implemented. >

This paper describes a new bump-fabrication technique for flip-chip connection between a chip and substrate. We propose a novel idea of forming solder microbumps on the substrate and directly bonding bare chips to the substrate. We successfully achieved the new flip-chip connection by using a 0.05Au-0.95Sn solder bump and a hydrogen-plasma reflow technique. Because the method eliminates the need for any process on the chip wafer, it will be very useful in fabricating flip-chip connections for low-cost packaging.

Shinji Aoyama

Papers

Three-dimensional passive circuit technology for ultra-compact MMICs

Fabrication of 0.95Sn−0.05Au solder micro-bumps for flip-chip bonding

Novel flip-chip bonding technology for W-band interconnections using alternate lead-free solder bumps

Three-dimensional passive circuit technology for ultra-compact MMICs

Novel micro-bump fabrication for flip-chip bonding