S
Simona Lorenti
Researcher at STMicroelectronics
Publications - 47
Citations - 522
Simona Lorenti is an academic researcher from STMicroelectronics. The author has contributed to research in topics: Silicon & Annealing (metallurgy). The author has an hindex of 13, co-authored 47 publications receiving 489 citations.
Papers
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Journal ArticleDOI
High efficiency light emitting devices in silicon
Maria Eloisa Castagna,Salvatore Coffa,Mariantonietta Monaco,Anna Muscara,Liliana Caristia,Simona Lorenti,Alberto Messina +6 more
TL;DR: In this article, a Si-based resonant cavity light emitting diode (RCLED) was constructed using chemical vapour deposition on a silicon substrate, where the Si/SiO 2 Fabry-Perot microcavities were fabricated to enhance the external quantum emission along the cavity axis and the spectral purity of emission from the films that were used as active media to fabricate a Sibased cavity light-emitting diode.
Journal ArticleDOI
Fabrication of miniaturised Si-based electrocatalytic membranes
TL;DR: In this article, preliminary results concerning the micromachining procedure for fabricating a Si-based electrocatalytic membrane for miniaturised Si based proton exchange membrane fuel cells (PEMFC) are presented.
Journal ArticleDOI
The early oxynitridation stages of hydrogen-terminated (100) silicon after exposure to N2:N2O. III. Initial conditions
Gianfranco Cerofolini,Clelia Galati,Simona Lorenti,Lucio Renna,O. Viscuso,Corrado Bongiorno,Vito Raineri,C. Spinella,Guglielmo G. Condorelli,Ignazio L. Fragalà,Antonio Terrasi +10 more
TL;DR: The structure and thermal stability in N2 of hydrogen-terminated (100) silicon has been studied by X-ray photoemission spectroscopy, transmission electron microscopy, atomic force microscopy and thermal programmed desorption, and reflection high energy electron diffraction as discussed by the authors.
Journal ArticleDOI
Temperature-dependent Fowler-Nordheim electron barrier height in SiO2/4H-SiC MOS capacitors
Patrick Fiorenza,Marilena Vivona,Ferdinando Iucolano,Andrea Severino,Simona Lorenti,Giuseppe Nicotra,Corrado Bongiorno,Filippo Giannazzo,Fabrizio Roccaforte +8 more
TL;DR: In this article, the physical and temperature-dependent electrical characterizations of the oxide/semiconductor interface in MOS capacitors with a SiO 2 layer deposited on 4H-SiC using dichlorosilane and nitrogen-based vapor precursors were reported.
Patent
Manufacturing method for a semiconductor substrate comprising at least a buried cavity and devices formed with this method
TL;DR: In this article, a method for manufacturing a semiconductor substrate of a first concentration type, which comprises at least a buried insulating cavity, is described, comprising the following steps: forming a plurality of trenches, forming a surface layer on the substrate in order to close superficially the plurality, forming in the meantime a buried cavity in correspondence with the surface-distal end of the trenches.