S
Stefan Malz
Researcher at University of Wuppertal
Publications - 20
Citations - 346
Stefan Malz is an academic researcher from University of Wuppertal. The author has contributed to research in topics: Noise figure & Amplifier. The author has an hindex of 9, co-authored 20 publications receiving 267 citations.
Papers
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Journal ArticleDOI
A Fully Integrated 240-GHz Direct-Conversion Quadrature Transmitter and Receiver Chipset in SiGe Technology
Neelanjan Sarmah,Janusz Grzyb,Konstantin Statnikov,Stefan Malz,Pedro Rodriguez Vazquez,Wolfgang Foerster,Bernd Heinemann,Ullrich R. Pfeiffer +7 more
TL;DR: In this paper, the authors present a direct-conversion quadrature transmitter and receiver chipset at 240 GHz, which is implemented in a 0.13-μm SiGe bipolar-CMOS technology.
Journal ArticleDOI
Active Multiple Feed On-Chip Antennas With Efficient In-Antenna Power Combining Operating at 200–320 GHz
TL;DR: In this article, the design and measurement of active multiple-feed on-chip antennas realized in a SiGe seven metal layer backend process are presented for millimeter-wave applications.
Proceedings ArticleDOI
A lens-integrated 430 GHz SiGe HBT source with up to −6.3 dBm radiated power
TL;DR: In this paper, the authors presented a 430 GHz source implemented in a 0.13-µm SiGe BiCMOS technology with f T /f max of 300 GHz/450 GHz.
Proceedings ArticleDOI
Current Status of Terahertz Integrated Circuits - From Components to Systems
Ullrich R. Pfeiffer,Ritesh Jain,Janusz Grzyb,Stefan Malz,Phillip Hillger,Pedro Rodriguez-Vazquez +5 more
TL;DR: The current status of THz integrated circuits in commercial silicon CMOS and SiGe HBT BiCMOS process technologies is reviewed and trends in silicon based THz sources and receivers are discussed, as well as different THz on-chip systems that have been reported so far for different application areas.
Proceedings ArticleDOI
A 233-GHz low noise amplifier with 22.5dB gain in 0.13μm SiGe
TL;DR: In this paper, a low-noise amplifier (LNA) design for 230GHz applications in an advanced SiGe heterojunction bipolar transistor technology is presented, which consists of a four-stage pseudo-differential cascode topology.