S
Subhash L. Shinde
Researcher at Sandia National Laboratories
Publications - 17
Citations - 411
Subhash L. Shinde is an academic researcher from Sandia National Laboratories. The author has contributed to research in topics: Front end of line & Phonon. The author has an hindex of 7, co-authored 17 publications receiving 389 citations.
Papers
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High Thermal Conductivity Materials
TL;DR: The concept of thermal conductivity was introduced by Eucken and Debye as discussed by the authors, who showed that diamond was a reasonably good conductor for heat at room temperature and established theoretical support for this discovery.
Journal ArticleDOI
High Thermal Conductivity Materials
TL;DR: The concept of thermal conductivity was introduced by Eucken and Debye as discussed by the authors, who showed that diamond was a reasonably good conductor for heat at room temperature and established theoretical support for this discovery.
Journal ArticleDOI
Measurement of the Kapitza resistance across a bicrystal interface
TL;DR: In this paper, the authors measured the Kapitza resistance across a Si bicrystal interface using a pump probe optical technique using ultrafast laser pulses to image lateral thermal transport in bare semiconductors.
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Time resolved imaging of carrier and thermal transport in silicon
TL;DR: In this article, the influence of thermal diffusion is isolated from that of carrier diffusion and recombination by decomposing changes in reflectivity in the latter sample into a transient component that varies with delay time and a steady-state component which varies with pump chopping frequency.
Patent
Focal plane array with modular pixel array components for scalability
Randolph R. Kay,David V. Campbell,Subhash L. Shinde,Jeffrey L. Rienstra,Darwin K. Serkland,Michael L. Holmes,Seethambal S. Mani,Joy M. Barker,Dahwey Chu,Thomas M. Gurrieri +9 more
TL;DR: In this paper, a modular, scalable focal plane array is provided as an array of integrated circuit dice, wherein each die includes a given amount of modular pixel array circuitry, and techniques for die stack interconnections and die stack placement are implemented to ensure the desired pixel pitch is preserved across the enlarged pixel array.