Preface. About the Authors. Acknowledgments. 1 Power Amplifier Fundamentals. 1.1 Introduction. 1.2 Definition of Power Amplifier Parameters. 1.3 Distortion Parameters. 1.4 Power Match Condition. 1.5 Class of Operation. 1.6 Overview of Semiconductors for PAs. 1.7 Devices for PA. 1.8 Appendix: Demonstration of Useful Relationships. 1.9 References. 2 Power Amplifier Design. 2.1 Introduction. 2.2 Design Flow. 2.3 Simplified Approaches. 2.4 The Tuned Load Amplifier. 2.5 Sample Design of a Tuned Load PA. 2.6 References. 3 Nonlinear Analysis for Power Amplifiers. 3.1 Introduction. 3.2 Linear vs. Nonlinear Circuits. 3.3 Time Domain Integration. 3.4 Example. 3.5 Solution by Series Expansion. 3.6 The Volterra Series. 3.7 The Fourier Series. 3.8 The Harmonic Balance. 3.9 Envelope Analysis. 3.10 Spectral Balance. 3.11 Large Signal Stability Issue. 3.12 References. 4 Load Pull. 4.1 Introduction. 4.2 Passive Source/Load Pull Measurement Systems. 4.3 Active Source/Load Pull Measurement Systems. 4.4 Measurement Test-sets. 4.5 Advanced Load Pull Measurements. 4.6 Source/Load Pull Characterization. 4.7 Determination of Optimum Load Condition. 4.8 Appendix: Construction of Simplified Load Pull Contours through Linear Simulations. 4.9 References. 5 High Efficiency PA Design Theory. 5.1 Introduction. 5.2 Power Balance in a PA. 5.3 Ideal Approaches. 5.4 High Frequency Harmonic Tuning Approaches. 5.5 High Frequency Third Harmonic Tuned (Class F). 5.6 High Frequency Second Harmonic Tuned. 5.7 High Frequency Second and Third Harmonic Tuned. 5.8 Design by Harmonic Tuning. 5.9 Final Remarks. 5.10 References. 6 Switched Amplifiers. 6.1 Introduction. 6.2 The Ideal Class E Amplifier. 6.3 Class E Behavioural Analysis. 6.4 Low Frequency Class E Amplifier Design. 6.5 Class E Amplifier Design with 50# Duty-cycle. 6.6 Examples of High Frequency Class E Amplifiers. 6.7 Class E vs. Harmonic Tuned. 6.8 Class E Final Remarks. 6.9 Appendix: Demonstration of Useful Relationships. 6.10 References. 7 High Frequency Class F Power Amplifiers. 7.1 Introduction. 7.2 Class F Description Based on Voltage Wave-shaping. 7.3 High Frequency Class F Amplifiers. 7.4 Bias Level Selection. 7.5 Class F Output Matching Network Design. 7.6 Class F Design Examples. 7.7 References. 8 High Frequency Harmonic Tuned Power Amplifiers. 8.1 Introduction. 8.2 Theory of Harmonic Tuned PA Design. 8.3 Input Device Nonlinear Phenomena: Theoretical Analysis. 8.4 Input Device Nonlinear Phenomena: Experimental Results. 8.5 Output Device Nonlinear Phenomena. 8.6 Design of a Second HT Power Amplifier. 8.7 Design of a Second and Third HT Power Amplifier. 8.8 Example of 2nd HT GaN PA. 8.9 Final Remarks. 8.10 References. 9 High Linearity in Efficient Power Amplifiers. 9.1 Introduction. 9.2 Systems Classification. 9.3 Linearity Issue. 9.4 Bias Point Influence on IMD. 9.5 Harmonic Loading Effects on IMD. 9.6 Appendix: Volterra Analysis Example. 9.7 References. 10 Power Combining. 10.1 Introduction. 10.2 Device Scaling Properties. 10.3 Power Budget. 10.4 Power Combiner Classification. 10.5 The T-junction Power Divider. 10.6 Wilkinson Combiner. 10.7 The Quadrature (90 ) Hybrid. 10.8 The 180 Hybrid (Ring Coupler or Rat-race). 10.9 Bus-bar Combiner. 10.10 Other Planar Combiners. 10.11 Corporate Combiners. 10.12 Resonating Planar Combiners. 10.13 Graceful Degradation. 10.14 Matching Properties of Combined PAs. 10.15 Unbalance Issue in Hybrid Combiners. 10.16 Appendix: Basic Properties of Three-port Networks. 10.17 References. 11 The Doherty Power Amplifier. 11.1 Introduction. 11.2 Doherty's Idea. 11.3 The Classical Doherty Configuration. 11.4 The 'AB-C' Doherty Amplifier Analysis. 11.5 Power Splitter Sizing. 11.6 Evaluation of the Gain in a Doherty Amplifier. 11.7 Design Example. 11.8 Advanced Solutions. 11.9 References. Index.

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High Efficiency RF and Microwave Solid State Power Amplifiers

A procedure performed by using a genuine two-port reciprocal network instead of a standard 'thru' in a full two-port error correction of an automatic network analyzer is presented. Although it can be applied to any type of waveguide system, the proposed technique is particularly useful with noninsertable coaxial or one-wafer devices. Experimental comparisons show that the suggested procedure provides a great degree of accuracy. >

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Two-port network analyzer calibration using an unknown 'thru'

According to one embodiment of the invention, there is provided a method of calibrating an N-port multiport test system for measurement of a DUT. The method consists of coupling each port of an N-port automatic calibration device to a respective port of the N-port multiport test system, and presenting three reflection standards with the automatic calibration device to each port of the N-port multiport test system. The method also consists of providing with the automatic calibration device, N−1 through conditions of a possible N(N−1)/2 possible through conditions, between corresponding ports of the N-port multiport test system, and making measurements with the N-port multiport test system of the three reflection standards at each port and the N−1 through conditions between the corresponding ports. The method further consists of determining all of systematic error coefficients for all of the ports of N-port multiport test system.

Method and apparatus for calibrating a multiport test system for measurement of a dut

© Cambridge University Press 2007 and Cambridge University Press, 2009.This 2007 book is a comprehensive exposition of FET modeling, and is a must-have resource for seasoned professionals and new graduates in the RF and microwave power amplifier design and modeling community. In it, you will find descriptions of characterization and measurement techniques, analysis methods, and the simulator implementation, model verification and validation procedures that are needed to produce a transistor model that can be used with confidence by the circuit designer. Written by semiconductor industry professionals with many years' device modeling experience in LDMOS and III-V technologies, this was the first book to address the modeling requirements specific to high-power RF transistors. A technology-independent approach is described, addressing thermal effects, scaling issues, nonlinear modeling, and in-package matching networks. These are illustrated using the current market-leading high-power RF technology, LDMOS, as well as with III-V power devices.

Modeling and Characterization of RF and Microwave Power FETs

A measurement setup and calibration procedure are described allowing the accurate on wafer measurement of phases and amplitudes of the spectral components of incident and scattered voltage waves at the signal ports of a nonlinear microwave device. A comparison is made between measurements performed with the setup and simulations based on a Root-model. >

Accurate on wafer measurement of phase and amplitude of the spectral components of incident and scattered voltage waves at the signal ports of a nonlinear microwave device

The on-wafer measurement of complex quantities and absolute power levels of active devices is truly significant for nonlinear device characterization and modeling. An original procedure, which allows one to perform both the vector and the power calibrations at the RF wafer probe tips used for on-wafer measurement of two-port devices, is presented. The measurement system is based on an automatic vector network analyzer with coaxial directional couplers and RF coplanar wafer probes. A new error model of the dual directional coupler, which samples the power waves traveling at device output, allows one to take advantage of the coaxial section at the output of the measuring system for calibrating the power level up to the on-wafer probe tips. >

An improved calibration technique for on-wafer large-signal transistor characterization

A generalized multiport network analyzer implemented using commercially available hardware is presented. Measurement calibration is accomplished through a novel calibration procedure which requires only conventional standards used for two-port calibrations. The calibration theory accounts for the errors due to the signal switching network but does not systematically remove errors due to signal switching leakage between port pairs. The approach is verified on a three-port test set implementation, and the measuring system can be expanded to n ports with additional hardware in a straightforward manner. Experimental verification was carried out through measurement of one-, two-, and three-port devices connected to the test set ports in several different ways. Excellent agreement of the same corrected S-parameters measured at different test set ports was observed, and confidence in system accuracy is established through measurement of two-port verification standards. >

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A new implementation of a multiport automatic network analyzer

The letter describes a load-pulling method that allows an extension of the two-signal approach to applications where the output frequency spectrum is different from the input one, as in the case of power devices operating with multicarrier input signals.

Active load technique for load-pull characterisation at microwave frequencies

In this paper, some of the latest advances in real-time load-pull technologies will be described. A recently introduced ultralow-loss directional coupler, which has been designed and realized by the authors, provides a number of advantages when used in load-pull test sets. This device has been called the load-pull head. The new ultralow-loss load-pull head can transform any passive precalibrated load-pull system into an easily calibrated and accurate real-time load-pull test set, without losing high-reflection-coefficient capabilities. Moreover, if used to realize an active loop, the load-pull head reduces the risks of oscillations and the amount of the loop amplifier output power. As an example application, measurements with a passive real-time load-pull setup of a 30-W laterally diffused MOS (LDMOS) transistor are presented. Furthermore, some advice to bypass the remaining unavoidable losses due to probes and cables is given. We will show, with measurements and with very simple calculations, that the combined use of load-pull heads, a passive tuner, and an active loop not only boosts the available GammaL but also decreases the loop amplifier output power, with a sensible reduction in the overall cost of the system.

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Umberto Pisani

Papers

Two-port network analyzer calibration using an unknown 'thru'

An improved calibration technique for on-wafer large-signal transistor characterization

A new implementation of a multiport automatic network analyzer

Active load technique for load-pull characterisation at microwave frequencies

Recent Advances in Real-Time Load-Pull Systems