The objective of this paper is to give a comprehensive introduction to applied cryptography with an engineer or computer scientist in mind. The emphasis is on the knowledge needed to create practical systems which supports integrity, confidentiality, or authenticity. Topics covered includes an introduction to the concepts in cryptography, attacks against cryptographic systems, key use and handling, random bit generation, encryption modes, and message authentication codes. Recommendations on algorithms and further reading is given in the end of the paper. This paper should make the reader able to build, understand and evaluate system descriptions and designs based on the cryptographic components described in the paper.

[서평]「Applied Cryptography」

Hardware intellectual-property (IP) cores have emerged as an integral part of modern system-on-chip (SoC) designs. However, IP vendors are facing major challenges to protect hardware IPs from IP piracy. This paper proposes a novel design methodology for hardware IP protection using netlist-level obfuscation. The proposed methodology can be integrated in the SoC design and manufacturing flow to simultaneously obfuscate and authenticate the design. Simulation results for a set of ISCAS-89 benchmark circuits and the advanced-encryption-standard IP core show that high levels of security can be achieved at less than 5% area and power overhead under delay constraint.

https://www.eecs.ucf.edu/~jinyier/courses/EEE4932/Papers_Final/HARPOON%20-%20An%20Obfuscation-Based%20SoC%20Design%20Methodology%20for%20Hardware%20Protection.pdf

HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection

High-level synthesis (HLS) is increasingly popular for the design of high-performance and energy-efficient heterogeneous systems, shortening time-to-market and addressing today’s system complexity. HLS allows designers to work at a higher-level of abstraction by using a software program to specify the hardware functionality. Additionally, HLS is particularly interesting for designing field-programmable gate array circuits, where hardware implementations can be easily refined and replaced in the target device. Recent years have seen much activity in the HLS research community, with a plethora of HLS tool offerings, from both industry and academia. All these tools may have different input languages, perform different internal optimizations, and produce results of different quality, even for the very same input description. Hence, it is challenging to compare their performance and understand which is the best for the hardware to be implemented. We present a comprehensive analysis of recent HLS tools, as well as overview the areas of active interest in the HLS research community. We also present a first-published methodology to evaluate different HLS tools. We use our methodology to compare one commercial and three academic tools on a common set of C benchmarks, aiming at performing an in-depth evaluation in terms of performance and the use of resources.

/pdf/a-survey-and-evaluation-of-fpga-high-level-synthesis-tools-4pv9ke4ji3.pdf

A Survey and Evaluation of FPGA High-Level Synthesis Tools

In this paper, we suggest a variational model for optic flow computation based on non-linearised and higher order constancy assumptions. Besides the common grey value constancy assumption, also gradient constancy, as well as the constancy of the Hessian and the Laplacian are proposed. Since the model strictly refrains from a linearisation of these assumptions, it is also capable to deal with large displacements. For the minimisation of the rather complex energy functional, we present an efficient numerical scheme employing two nested fixed point iterations. Following a coarse-to-fine strategy it turns out that there is a theoretical foundation of so-called warping techniques hitherto justified only on an experimental basis. Since our algorithm consists of the integration of various concepts, ranging from different constancy assumptions to numerical implementation issues, a detailed account of the effect of each of these concepts is included in the experimental section. The superior performance of the proposed method shows up by significantly smaller estimation errors when compared to previous techniques. Further experiments also confirm excellent robustness under noise and insensitivity to parameter variations.

Highly accurate optic flow computation with theoretically justified warping

As the electronic component supply chain grows more complex due to globalization, with parts coming from a diverse set of suppliers, counterfeit electronics have become a major challenge that calls for immediate solutions. Currently, there are a few standards and programs available that address the testing for such counterfeit parts. However, not enough research has yet addressed the detection and avoidance of all counterfeit partsVrecycled, remarked, overproduced, cloned, out-of-spec/defective, and forged documentationVcurrently infiltrating the electronic component supply chain. Even if they work initially, all these parts may have reduced lifetime and pose reliability risks. In this tutorial, we will provide a review of some of the existing counterfeit detection and avoidance methods. We will also discuss the challenges ahead for im- plementing these methods, as well as the development of new detection and avoidance mechanisms.

/pdf/counterfeit-integrated-circuits-a-rising-threat-in-the-1cfbkrfgxn.pdf

Counterfeit Integrated Circuits: A Rising Threat in the Global Semiconductor Supply Chain

FIR filters are routinely used in the implementation of modern digital signal processing systems, such as the discrete wavelet transform. Their efficient implementation using commercially available VLSI technology is a subject of continuous study and development. This paper presents the implementation using modern Altera APEX20K field-programmable logic (FPL) devices of reduced complexity and high performance FIR filters by means of the residue number system (RNS). Index arithmetic over Galois fields and the quadratic residue number systems (QRNS) together with a selection of a small wordwidth modulus set are the keys for attaining low-complexity and high-throughput in real and complex FIR filters. RNS-FPL merged FIR filters were about 65% faster than 2C designs and required fewer logic elements in most cases. An index arithmetic QRNS-based complex FIR filter yielded better results. This filter was up to 60% faster than the three-multiplier-per-tap filter and required fewer LEs for filters having more than 8 taps. Particularly, a 32-tap filter needed 24% LEs less than the classical design.

Implementation of reduced complexity, high performance programmable wavelet FIR filters using field-programmable logic

Gabor and Morlet wavelet filterbanks are popular in signal and image processing because they provide good time- frequency resolutions. This paper shows how to realize efficient Gabor and Morlet wavelet filterbanks based on approximations through frequency sampling filters in the Residue Number System which provides an exact pole-zero annihilating for poles on the unit circle in the complex z- plane. The aim of the paper is that the computational 'gap' between dyadic DWT and transforms with Gabor and Morlet wavelet filterbanks becomes less dramatic.

High-speed implementation of Gabor and Morlet wavelet filter banks using RNS frequency sampling filters

Automated detection and diagnosis of small lesions in breast MRI represents a challenge for the traditional computer-aided diagnosis (CAD) systems. The goal of the present research was to compare and determine the optimal feature sets describing the morphology and the enhancement kinetic features for a set of small lesions and to determine their diagnostic performance. For each of the small lesions, we extracted morphological and dynamical features describing both global and local shape, and kinetics behavior. In this paper, we compare the performance of each extracted feature set for the differential diagnosis of enhancing lesions in breast MRI. Based on several simulation results, we determined the optimal feature number and tested different classification techniques. The results suggest that the computerized analysis system based on spatiotemporal features has the potential to increase the diagnostic accuracy of MRI mammography for small lesions and can be used as a basis for computer-aided diagnosis of breast cancer with MR mammography.

/pdf/selection-of-spatiotemporal-features-in-breast-mri-to-5a2hna5v4u.pdf

Selection of spatiotemporal features in breast MRI to differentiate between malignant and benign small lesions using computer-aided diagnosis

A frequent task in digital signal processing is to adjust the sampling rate according to the signal of interest. Systems with different sampling rates are referred to as multirate systems. In this chapter, two typical examples will illustrate decimation and interpolation in multirate DSP systems. We will then introduce polyphase notation, and will discuss some efficient decimator designs. At the end of the chapter we will discuss filter banks and a quite new, highly celebrated addition to the DSP toolbox: wavelet analysis.

Multirate Signal Processing

Alternative data paths for the cascaded integrator-comb (CIC) decimator are presented that can be derived upon applying one or two modifications. In the first modification, the integrator-comb pair that surrounds the downsampling register is replaced by a simpler Integrate-and-Dump (ID) block that performs the same decimation task. The resulting data path is referred to as CIC-ID. In the second modification, the remaining comb filters are replaced by a timemultiplexed comb, and the resulting data path is referred to as CIC-ID-TMUX. Compared with a classic N -stage CIC, CIC-ID saves one arithmetic unit and one register, whereas CIC-ID-TMUX uses the same number of registers but trades ( N - 1) arithmetic units for a simpler two-to-one multiplexer. Both CIC-ID and CIC-ID-TMUX perform slightly fewer arithmetic operations per output sample because of the absence of the comb filter absorbed by the ID block. Pruning formulas for both architectures are presented along with implementation details.

Uwe Meyer-Baese

Papers

Implementation of reduced complexity, high performance programmable wavelet FIR filters using field-programmable logic

High-speed implementation of Gabor and Morlet wavelet filter banks using RNS frequency sampling filters

Selection of spatiotemporal features in breast MRI to differentiate between malignant and benign small lesions using computer-aided diagnosis

Multirate Signal Processing

Alternative Data Paths for the Cascaded Integrator-Comb Decimator [Tips a Tricks]