Recently utilities are continuously seeking cost-effective and accurate power quality (PQ) improvement techniques in order to achieve customer satisfaction. This paper intends to provide a comprehensive review on the status of topological aspects of techniques used to improve the power quality in distribution network for the researchers, designers and engineers working in this area. This review helps to select a PQ improvement technique that suits a specific application in terms of technical and economical aspects. More than 300 research publications on the state of the art of PQ improvement techniques have been rigorously analyzed, classified and listed for quick reference.

Topological aspects of power quality improvement techniques: A comprehensive overview

Overview of key microgrid technologies

In the recent years the multilevel inverters were widely discussed topic for researchers. Because of few merits of having good power quality. Basically inverter is a converter, which is capable in converting the DC power into AC power at desired level. The two level output, zero or positive or negative V dc can be obtained by voltage source inverter(VSI). The multilevel inverter is capable to produce sinusoidal output voltage and to reduce Total Harmonic Distortion at desired voltage level. As we increase the level of voltage, the output power quality gets improved, i.e. THD gets reduced. This paper proposes the implementation and analysis of cascaded multilevel inverter with reduce THD. The implemented Cascaded H-bridge Multilevel Inverter topology is a practical topology; it provides the generalized path to increase the level of multilevel inverter as we want. In the represented model of eleven level single phase Cascaded H-bridge Multilevel Inverter has been designed using IGBT in order to generate the different output voltage levels at proper intervals, the conduction angle of IGBTs have been controlled by varying the pulse width of getting signals. Simulation models is developed in MATLAB-SIMULINK of eleven levels inverters and THD analysis is performed.

An Efficient Technique to reduce Total Harmonics Distortion in Cascaded H- Bridge Multilevel Inverter

Advances in reduction of total harmonic distortion in solar photovoltaic systems: A literature review

This article presents a dynamic voltage support (DVS) scheme for achieving low-voltage ride-through (LVRT) with a grid-connected photovoltaic (PV) inverter during the voltage sag fault. The DVS scheme is achieved by formulating an additional reactive active current control mode which is developed from a conventional reactive current control approach. This provides stable operation of the system and achieves higher effectiveness due to the lower X / R ratio at the point of common coupling in low-voltage networks. Further, the performance of the proposed controller is assessed by simulating a 4 kW system for voltage sag faults. Further, the proposed controller tested with the real-time simulations and experimental setup for voltage sag conditions. The results presented demonstrate that the active and reactive power is regulated in concordance with grid code requirements. The controller achieves LVRT within the time limits of grid standard during symmetrical faults, which makes it appropriate for fast transient events. This operates the PV system under its nominal capacity, avoiding unwanted grid disconnection events.

Dynamic Voltage Support for Low-Voltage Ride-Through Operation in Single-Phase Grid-Connected Photovoltaic Systems

Double reference single carrier modulation technique is a new technique employed for generating pulses for multilevel inverters. This paper presents a simulation of a transistor clamped H-bridge multilevel inverter using double reference single carrier modulation technique. Using the modulation technique, output voltage, output current and voltage stress across the switches of the transistor clamped multilevel inverter is obtained. The total harmonic distortion obtained for different values of the modulation index is presented. Further, the paper aims to perform a comparison of a transistor clamped H-Bridge multilevel inverter with a conventional cascaded H-Bridge multilevel inverter. The comparison is done with respect to complexity of the circuit topologies and total harmonic distortion obtained with both the multilevel inverters. Results are obtained using simulations done in MATLAB Simulink environment.

Simulation of a transistor clamped H-bridge multilevel inverter and its comparison with a conventional H-bridge multilevel inverter

Harmonic reduction in inverters fed from a standalone PV system is currently becoming important in medium power applications This paper focuses on the design and analysis of various passive filters for power quality improvement in standalone PV systems Different passive filters are designed and analysed to reduce the total harmonic distortion of the proposed system The passive filters include LC, LCL and LLCC filter topologies A comparison study of the total harmonic distortion reduction with the above filters is done Further, the paper attempts to show that the use of LLCC filter with a standalone PV system can highly improve the power quality of the system Results are verified using simulations in MATLAB-SIMULINK environment

Analysis and design of passive filters for power quality improvement in standalone PV systems

Small Signal Modeling of a DC-DC Type Double Boost Converter Integrated with SEPIC Converter Using State Space Averaging Approach

Standards applied to electrical energy systems require pure sinusoidal waveforms, with lesser harmonic contents. This work aims to design and perform a comparative analysis of LC and LCL type passive filters for harmonic reduction in standalone PV systems. The work provides procedural steps to choose the filter component values that include the reactive elements and damping resistance. The design steps for the filters consider harmonics emerging due to inverter switching. Frequency response characteristics are obtained to assess the filter performance. A 110V/250 W inverter is implemented to examine the designed filter performance on an experimental platform with the modulation algorithm implemented using a SPARTAN 3E-XCS250E FPGA processor. Simulation and experimental results are incorporated to assess the LC and LCL filter designs with regard to harmonic distortion reduction and output waveform quality.

Implementation of LC and LCL passive filters for harmonic reduction in PV based renewable energy systems

Recently, multilevel inverters are more researched due to the advantages they offer over conventional voltage source inverters in grid connected applications. Passive filters are connected at the output of these inverters to produce sinusoidal waveforms with reduced harmonics and to satisfy grid interconnection standard requirements. This work proposes a new passive filter topology for a pulse width modulated five-level cascaded inverter interfaced grid connected system. The proposed passive filter inserts an additional resistance-capacitance branch in parallel to the filter capacitor of the traditional inductive–capacitive–inductive filter in addition to a resistance in series with it to reduce damping power loss. It can attenuate the switching frequency harmonic current components much better than the traditional filter while maintaining the same overall inductance, reduced capacitance and resistance values. The basic parameter design procedure and an approach to discover the parameters of the proposed filter is introduced. Further, a novel methodology using Particle Swarm Optimization (PSO) is recommended to guarantee minimum damping loss while ensuring reduced peak during resonance. In addition, PSO algorithm is newly employed in this work to maximize harmonic attenuation in and around the switching frequency on the premise of allowable values of filter inductance and capacitance. A comparative discussion considering traditional passive filters and the proposed filter is presented and evaluated through experiments conducted on a 110 V, 1 kW five-level grid connected inverter. The modulation algorithm for the multilevel inverter is implemented using a SPARTAN 6-XC6SLX25 Field Programmable Gate Array (FPGA) processor. The analysis shows that the proposed filter not only provides decreased damping power loss but also is capable of providing considerable harmonic ripple reduction in the high frequency band, improved output waveforms and lesser Total Harmonic Distortion (THD) with improved power quality for the multilevel inverter based grid connected system.

https://www.mdpi.com/1996-1073/10/11/1834/pdf

Power Quality Improvement in a Cascaded Multilevel Inverter Interfaced Grid Connected System Using a Modified Inductive–Capacitive–Inductive Filter with Reduced Power Loss and Improved Harmonic Attenuation

V. T. Sreedevi

Papers

Simulation of a transistor clamped H-bridge multilevel inverter and its comparison with a conventional H-bridge multilevel inverter

Analysis and design of passive filters for power quality improvement in standalone PV systems

Small Signal Modeling of a DC-DC Type Double Boost Converter Integrated with SEPIC Converter Using State Space Averaging Approach

Implementation of LC and LCL passive filters for harmonic reduction in PV based renewable energy systems

Power Quality Improvement in a Cascaded Multilevel Inverter Interfaced Grid Connected System Using a Modified Inductive–Capacitive–Inductive Filter with Reduced Power Loss and Improved Harmonic Attenuation