A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure.

Semiconductor Device and Method of Fabricating the Same

A method for fabricating floating body memory cells (FBCs), and the resultant FBCs where gates favoring different conductivity type regions are used is described. In one embodiment, a p type back gate with a thicker insulation is used with a thinner insulated n type front gate. Processing, which compensates for misalignment, which allows the different oxide and gate materials to be fabricated is described.

Floating body memory cell having gates favoring different conductivity type regions

A method for fabricating a semiconductor device includes forming a recess gate over a semiconductor substrate. A gate spacer is formed on a sidewall of the recess gate. The semiconductor substrate in a landing plug contact region is soft-etched to form a recess having a rounded profile. A sidewall spacer is formed over the gate spacer and a sidewall of the recess. An insulating film is formed over the semiconductor substrate. The insulating film is selectively etched to form a landing plug contact hole. A conductive layer in the landing plug contact hole is filled to form a landing plug.

Semiconductor Device and Method for Fabricating the Same

Vertical gate all around (VGAA) devices and methods of manufacture thereof are described. A method for manufacturing a VGAA device includes: forming a first doped region having a first conductivity in a substrate; forming a second doped region having a second conductivity different from the first conductivity in the substrate, the second doped region disposed laterally adjacent to and spaced apart from the first doped region; and oxidizing a semiconductive layer disposed between the substrate and the second doped region to form an oxidized isolation layer.

Vertical Gate All Around (VGAA) Devices and Methods of Manufacturing the Same

A method of forming a plurality of transistor gates having at least two different work functions includes forming first and second transistor gates over a substrate having different widths, with the first width being narrower than the second width. A material is deposited over the substrate including over the first and second gates. Within an etch chamber, the material is etched from over both the first and second gates to expose conductive material of the first gate and to reduce thickness of the material received over the second gate yet leave the second gate covered by the material. In situ within the etch chamber after the etching, the substrate is subjected to a plasma comprising a metal at a substrate temperature of at least 300° C. to diffuse said metal into the first gate to modify work function of the first gate as compared to work function of the second gate.

Methods of Forming a Plurality of Transistor Gates, and Methods of Forming a Plurality of Transistor Gates Having at Least Two Different Work Functions

A recessed access device having a gate electrode formed of two or more gate materials having different work functions may reduce the gate-induced drain leakage current losses from the recessed access device. The gate electrode may include a first gate material having a high work function disposed in a bottom portion of the recessed access device and a second gate material having a lower work function disposed over the first gate material and in an upper portion of the recessed access device.

Dual Work Function Recessed Access Device and Methods of Forming

A method for forming an opening within a semiconductor material comprises forming a neck portion, a rounded portion below the neck portion and, in some embodiments, a protruding portion below the rounded portion. This opening may be filled with a conductor, a dielectric, or both. Embodiments to form a transistor gate, shallow trench isolation, and an isolation material separating a transistor source and drain are disclosed. Device structures formed by the method are also described.

Semiconductor device comprising transistor structures and methods for forming same

The invention includes floating body transistor constructions containing U-shaped semiconductor material slices The U-shapes have a pair of prongs joined to a central portion Each of the prongs contains a source/drain region of a pair of gatedly-coupled source/drain regions, and the floating bodies of the transistors are within the central portions The semiconductor material slices can be between front gates and back gates The floating body transistor constructions can be incorporated into memory arrays, which in turn can be incorporated into electronic systems The invention also includes methods of forming floating body transistor constructions, and methods of incorporating floating body transistor constructions into memory arrays

Floating body transistor constructions, semiconductor constructions, and methods of forming semiconductor constructions

Impact ionization devices including vertical and recessed impact ionization metal oxide semiconductor field effect transistor (MOSFET) devices and methods of forming such devices are disclosed. The devices require lower threshold voltage than conventional MOSET devices while maintaining a footprint equal to or less than conventional MOSFET devices.

Impact ionization devices and methods of making the same

Threshold voltage and drive current for a cylindrical MOSFET have been rigorously derived for the first time. An approximate expression for these quantities is presented for the purpose of analytical calculations. The model has been verified against TCAD simulations. The characteristics of a recessed gate MOSFET is analysed using these models.

Venkatesan Ananthan

Papers

Dual Work Function Recessed Access Device and Methods of Forming

Semiconductor device comprising transistor structures and methods for forming same

Floating body transistor constructions, semiconductor constructions, and methods of forming semiconductor constructions

Impact ionization devices and methods of making the same

Derivation of threshold voltage and drain current for cylindrical MOSFET and application to a recessed MOSFET