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Design Of Analog Cmos Integrated Circuits

A low-transconductance OTA with improved linearity suitable for low-frequency Gm-C filters

Sub-threshold, cascode compensated, bulk-driven OTAs with enhanced gain and phase-margin

This paper presents an ultra-low-power, bulk-driven, source-degenerated fully differential transconductor (FD-OTA), operating in subthreshold region. The source-degeneration (SD) and bulk-drive ensure linearity and rail-to-rail input swing. The flipped voltage follower and SD resistor perform V–I conversion in input core with power efficient class AB mode of operation. The reduction in open loop gain and gain bandwidth (GBW) of bulk-drive is compensated by applying partial positive feedback at diode connected MOSFET pair. The current gain from input core to output load side is set (1:1) in OTA1 and (1:4) in OTA2. The OTA2 offers increased transconductance and GBW whereas self-cascode load increases the output impedance and overall gain of the FD-OTAs. Both the input core and common source self-cascode load operate in class AB mode so these FD-OTAs provide enhanced slew rates. These OTAs have been employed to implement Biquadratic low-frequency Gm-C filter suitable for bio-signal applications. The proposed OTA2 has used dual supply voltage of ± 0.3 V and dissipates around 70 nW power and provides 62 dB FD-open loop gain with GBW of 7.73 kHz while driving the FD-load of 2 × 15 pF. The Cadence VIRTUOSO environment using UMC 0.18 µm CMOS process technology has been used to simulate the proposed circuit. The Simulation results verified fully differential total harmonic distortion of − 72 dB, for 1.2 Vp–p signal at 200 Hz frequency in unity gain configuration with resistive degeneration of 1 MΩ for OTA1.

Ultra-low-power bulk-driven fully differential subthreshold OTAs with partial positive feedback for Gm-C filters

In this paper, a floating gate OTA using Flipped Voltage Follower (FG-FVF OTA) and its modified version with bulk-driven floating gate MOSFETs (BDFG-FVF OTA) are proposed. The FVF configuration is used to reduce the power consumption while the combination of bulk-driven and floating gate techniques is employed to enhance the linearity of the OTA. The proposed OTAs are compared with a floating gate OTA (FG OTA) to show the performance improvement. All the OTAs are designed and simulated in Candace Virtuoso tool using 0.18 μm CMOS process technology. The circuits are biased with ±0.5 V power supply. The simulation results show that the proposed BDFG-FVF OTA has less variation in transconductance for large range of input differential voltage as compared to FG OTA. BDFG-FVF OTA shows 8 dB improvement in HD3 for 0.2 Vpp differential voltage at 1 MHz frequency as compared to conventional FG OTA and its power consumption is 158 μW which is 36% lesser than that of FG OTA. All these improvements in proposed OTA are achieved at cost of 0.07% reduction in bandwidth. An application of proposed OTA is also presented in the form of universal Gm-C filter to ensure the workability of the proposed OTA.

A low-voltage highly linear OTA using bulk-driven floating gate MOSFETs

This paper presents a single-stage ultra-low-power fully differential operational transconductance amplifier (FD-OTA) with rail-to-rail linear input range operating in weak inversion region. The input core of the OTA is comprised of source degenerated, flipped voltage follower (FVF)-based bulk-driven class AB input pair, into which a regenerative feedback loop has been inserted to boost its bulk transconductance (gmb). The proposed FD-OTA has utilized self-cascode current mirror (SC-CM) loads, which increase its open loop gain from nominal intrinsic value of 42dB to 70.4dB. It has provided 9.24kHz gain bandwidth (GBW), consuming 64nW of quiescent power from a 0.51V single power supply at 15pF load. The proposed OTA in unity gain configuration has ensured reduced total harmonic distortion (THD) of −52.4dB at 200Hz frequency and 1Vp-p signal swing. Its fully differential class AB input and output structures have ensured increased gain, GBW, slew rates and output swings with reduced nonlinearity and common mode substrate noise. The Cadence Virtuoso environment using GPDK 180nm standard n-well CMOS process technology has been used to simulate the proposed circuit.

Fully Differential, Bulk-Driven, Class AB, Sub-Threshold OTA With Enhanced Slew Rates and Gain

In this paper a novel low-voltage and low-power rail-to-rail linear operational transconductance amplifier (OTA), operating in sub-threshold region is presented The source degenerated bulk-driven input stage ensures rail-to-rail operation with enhanced linearity To enhance its transconductance and current drive capability a regenerative feedback at input transistor's gates has been employed The OTA operating at 05 V supply ensured total harmonic distortion (THD) (p-p) signal at 200 Hz frequency in its unity gain configuration

Vijaya Bhadauria

Papers

Fully Differential, Bulk-Driven, Class AB, Sub-Threshold OTA With Enhanced Slew Rates and Gain

Sub-threshold, cascode compensated, bulk-driven OTAs with enhanced gain and phase-margin

Ultra-low-power bulk-driven fully differential subthreshold OTAs with partial positive feedback for Gm-C filters

A low-voltage highly linear OTA using bulk-driven floating gate MOSFETs

Ultra low-power rail-to-rail linear sub-threshold bulk-driven transconductor