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Wanfeng Zhang
Researcher at Queen's University
Publications - 13
Citations - 663
Wanfeng Zhang is an academic researcher from Queen's University. The author has contributed to research in topics: Power factor & Duty cycle. The author has an hindex of 10, co-authored 13 publications receiving 656 citations.
Papers
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Journal ArticleDOI
A digital power factor correction (PFC) control strategy optimized for DSP
TL;DR: In this paper, a predictive algorithm for digital control power factor correction (PFC) is presented, where all of the duty cycles required to achieve unity power factor in one half line period are calculated in advance by digital signal processors (DSP).
Journal ArticleDOI
A New Duty Cycle Control Strategy for Power Factor Correction and FPGA Implementation
Wanfeng Zhang,Yan-Fei Liu,Bin Wu +2 more
TL;DR: In this paper, a new duty cycle control strategy for boost PFC implementations is proposed, which is determined based on the input voltage, reference output voltage, inductor current, and reference current.
Patent
Parallel current mode control
Wanfeng Zhang,Yan-Fei Liu,Bin Wu +2 more
TL;DR: In this paper, a duty cycle algorithm is composed of a voltage term and a parallel current term, which depends on the inductor current change between the induction current value at the beginning of a switching cycle and the reference inductor value at end of that switching cycle.
Patent
Parallel Current Mode Control Using a Direct Duty Cycle Algorithm with Low Computational Requirements to Perform Power Factor Correction
Wanfeng Zhang,Yan-Fei Liu,Bin Wu +2 more
TL;DR: In this article, a duty cycle algorithm is composed of a voltage term and a parallel current term, which depends on the inductor current change between the induction current value at the beginning of a switching cycle and the reference inductor value at end of that switching cycle.
Proceedings ArticleDOI
DSP implementation of predictive control strategy for power factor correction (PFC)
TL;DR: In this article, a predictive algorithm for digital control PFC is presented, where all of the duty cycles required to achieve unity power factor in one half line period are calculated in advance by the DSP.