This survey deals with 1/f noise in homogeneous semiconductor samples. A distinction is made between mobility noise and number noise. It is shown that there always is mobility noise with an /spl alpha/ value with a magnitude in the order of 10/sup -4/. Damaging the crystal has a strong influence on /spl alpha/, /spl alpha/ may increase by orders of magnitude. Some theoretical models are briefly discussed none of them can explain all experimental results. The /spl alpha/ values of several semiconductors are given. These values can be used in calculations of 1/f noise in devices. >

1/f Noise Sources

Phosphorus is a nonmetal with several allotropes, from the highly reactive white phosphorus to the thermodynamically stable black phosphorus (BP) with a puckered orthorhombic layered structure. The bulk form of BP was first synthesized in 1914, but received little attention until it was rediscovered in 2014 as a member of the new wave of 2D layered nanomaterials. BP can be exfoliated to a single sheet that acts as a semiconductor with a tunable direct band gap, a high carrier mobility at room temperature, and an in-plane anisotropy. The development of BP applications is hampered by surface degradation, thus efforts to achieve effective BP passivation are ongoing, such as its integration in van der Waals heterostructures. BP has been tested as a novel nanomaterial in batteries, transistors, sensors, and photonics. This Review begins with the origin of the BP story, following the path from a bulk material to modern few/single layers. The physical and chemical properties are summarized, and the state-of-the-art of BP applications highlighted.

Black Phosphorus Rediscovered: From Bulk Material to Monolayers

Experimental demonstrations of one-dimensional (1D) van der Waals material tellurium (Te) have been presented by Raman spectroscopy under strain and magneto-transport. Raman spectroscopy measurements have been performed under strains along different principle axes. Pronounced strain response along the c-axis is observed due to the strong intrachain covalent bonds, while no strain response is obtained along the a-axis due to the weak interchain van der Waals interaction. Magneto-transport results further verify its anisotropic property, which results in dramatically distinct magneto-resistance behaviors in terms of three different magnetic field directions. Specifically, phase coherence length extracted from weak antilocalization effect, Lϕ ≈ T–0.5, claims its two-dimensional (2D) transport characteristics when an applied magnetic field is perpendicular to the thin film. In contrast, Lϕ ≈ T–0.33 is obtained from universal conductance fluctuations once the magnetic field is along the c-axis of Te, which ind...

One-Dimensional van der Waals Material Tellurium: Raman Spectroscopy under Strain and Magneto-Transport

Fundamentals Of Modern Vlsi Devices

Recent progress on graphene-analogous 2D nanomaterials: Properties, modeling and applications

The Poisson’s ratio of a material characterizes its response to uniaxial strain. Materials normally possess a positive Poisson’s ratio - they contract laterally when stretched, and expand laterally when compressed. A negative Poisson’s ratio is theoretically permissible but has not, with few exceptions of man-made bulk structures, been experimentally observed in any natural materials. Here, we show that the negative Poisson’s ratio exists in the low-dimensional natural material black phosphorus and that our experimental observations are consistent with first-principles simulations. Through applying uniaxial strain along armchair direction, we have succeeded in demonstrating a cross-plane interlayer negative Poisson’s ratio on black phosphorus for the first time. Meanwhile, our results support the existence of a cross-plane intralayer negative Poisson’s ratio in the constituent phosphorene layers under uniaxial deformation along the zigzag axis, which is in line with a previous theoretical prediction. The ...

Auxetic Black Phosphorus: A 2D Material with Negative Poisson’s Ratio

Ge nanowire CMOS circuits are experimentally demonstrated on a Ge on insulator (GeOI) substrate for the first time. The nanowire CMOS devices have channel lengths (Lch) from 100 to 40 nm, nanowire height (HNW) of 10 nm and nanowire widths (WNW) from 40 to 10 nm, and dielectric EOTs of 2 and 5 nm. Four types of Ge MOSFETs: accumulation mode (AM) and inversion mode (IM) nFETs and pFETs are studied in great details. Record low SS of 64 mV/dec and high maximum trans-conductance (gmax) of 1057 μS/μm are obtained on Ge nanowire nFETs. Furthermore, hybrid Ge nanowire CMOS with AM nFET and IM pFET is also first realized. The highest maximum voltage gain reaches 54 V/V.

First demonstration of Ge nanowire CMOS circuits: Lowest SS of 64 mV/dec, highest gmax of 1057 μS/μm in Ge nFETs and highest maximum voltage gain of 54 V/V in Ge CMOS inverters

In this paper, Ge nanowire (NW) CMOS devices and circuits are analyzed in detail. Various experiment splits are studied, including device geometry parameters such as the channel lengths ( $L_{\mathrm{ ch}}$ ) from 100 to 40 nm, a NW height ( $H_{\mathrm{ NW}}$ ) of 10 nm, the NW widths ( $W_{\mathrm{ NW}}$ ) from 40 to 10 nm, and the dielectric equivalent oxide thicknesses (EOTs) of 2 and 5 nm, and four types of device operation modes of accumulation mode (AM) and inversion mode (IM) n-type MOSFETs and p-type MOSFETs. Benefited from the NW structure with scaled EOT, subthreshold swing (SS) as low as 64 mV/dec and maximum transconductance ( $g_{\max }$ ) as high as $1057~\mu \text{S}/\mu \text{m}$ are obtained on the Ge NW nMOSFETs. The NW pMOSFETs are also realized on the same common substrate. Furthermore, hybrid Ge NW CMOS with AM nMOSFET and IM pMOSFET is demonstrated for the first time on a Si substrate. The highest maximum voltage gain reaches 54 V/V in the Ge NW CMOS inverters.

Demonstration of Ge Nanowire CMOS Devices and Circuits for Ultimate Scaling

In this work, we report on a 3D device fabrication technology achieved by applying a novel anisotropic wet etching method. By aligning channel structures along different crystal orientations, high performance 3D InGaAs devices with different channel shapes such as fins, nanowires and waves have been demonstrated. With further optimizing off-state leakage path by barrier engineering, a record high ION/IOFF over 108 and minimum IOFF∼3pA/μm have been obtained from InGaAs FinFET device. Scaling metrics for InGaAs GAA MOSFETs and FinFETs are systematically studied with Lch from 800 nm down to 50 nm and WFin/WNW from 100 nm down to 20 nm which shows an excellent immunity to short channel effects.

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InGaAs 3D MOSFETs with drastically different shapes formed by anisotropic wet etching

In this letter, we comprehensively study the carriers’ mobility and the effect of back-gate bias ( ${V} _{\textsf {bg}}$ ) in Ge-on-insulator (GeOI) MOSFETs with various working modes, including accumulation mode (AM) nMOSFET, inversion mode (IM) nMOSFET, AM pMOSFET, and IM pMOSFET. The results show that the AM nMOSFETs and pMOSFETs have higher drain currents and carriers’ mobility. The electron mobility increases under positive ${V} _{\textsf {bg}}$ and decreases under negative ${V} _{\textsf {bg}}$ . While the hole mobility has the opposite ${V} _{\textsf {bg}}$ dependence. The carriers’ mobility of AM MOSFETs is proved to benefit more from ${V} _{\textsf {bg}}$ due to the increase of carriers’ densities. The peak mobility enhancements of more than 100% for holes and 35% for electrons are achieved in GeOI MOSFETs by applying ${V} _{\textsf {bg}}$ .

Wangran Wu

Papers

Auxetic Black Phosphorus: A 2D Material with Negative Poisson’s Ratio

First demonstration of Ge nanowire CMOS circuits: Lowest SS of 64 mV/dec, highest gmax of 1057 μS/μm in Ge nFETs and highest maximum voltage gain of 54 V/V in Ge CMOS inverters

Demonstration of Ge Nanowire CMOS Devices and Circuits for Ultimate Scaling

InGaAs 3D MOSFETs with drastically different shapes formed by anisotropic wet etching

Carrier Mobility Enhancement by Applying Back-Gate Bias in Ge-on-Insulator MOSFETs