Xin Chen

TL;DR: In this paper, a study of the stability of grid-connected inverters with high grid impedance based on impedance analysis is presented, where the effects of the PLL loop and the digital control delays on the output impedance characteristics have been taken into account.

TL;DR: This paper presents sequence impedance modeling and analysis of modular multilevel converters (MMCs) in a single-star configuration for static VAR compensation (STATCOM) application to understand the similarities and differences in the impedance characteristics of the two configurations as well as the effects on stability.

TL;DR: In this paper, the saddle pulsewidth modulation (PWM) was obtained by injecting third harmonic current into sampled three-phase input currents, which can not only improve the utilisation of DC bus voltage and the efficiency of converter without sacrificing the advantages of the conventional OCC scheme, such as no phase-locked loop and constant switching frequency, but also is beneficial to suppress the ripple in the DClink voltage.

TL;DR: In this article, the frequency characteristic of phase-locked loop (PLL) was analyzed, and a design approach of PLL regulator parameters was proposed to make a theoretical analysis and experiment validation of the interaction stability of the grid connected system.

TL;DR: The optimized design method of the PLL is proposed from the perspective of optimizing the inverter impedance characteristics to improve the system stability and confirm the effectiveness of the optimize design method.