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Xing Hu

Researcher at Chinese Academy of Sciences

Publications -  65
Citations -  1508

Xing Hu is an academic researcher from Chinese Academy of Sciences. The author has contributed to research in topics: Artificial neural network & Speedup. The author has an hindex of 15, co-authored 60 publications receiving 663 citations. Previous affiliations of Xing Hu include Advanced Micro Devices & University of California, Santa Barbara.

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Proceedings ArticleDOI

HyGCN: A GCN Accelerator with Hybrid Architecture

TL;DR: This work describes the hybrid execution patterns of GCNs on Intel Xeon CPU and proposes a hardware design with two efficient processing engines to alleviate the irregularity of Aggregation phase and leverage the regularity of Combination phase, and designs a GCN accelerator using a hybrid architecture to efficiently perform GCNs.
Journal ArticleDOI

Rethinking the performance comparison between SNNS and ANNS.

TL;DR: This paper designs a series of contrast tests using different types of datasets (ANN-oriented and SNN-oriented), diverse processing models, signal conversion methods, and learning algorithms, and recommends the most suitable model for each scenario and highlights the urgent need to build a benchmarking framework for SNNs with broader tasks, datasets, and metrics.
Proceedings ArticleDOI

DeepSniffer: A DNN Model Extraction Framework Based on Learning Architectural Hints

TL;DR: DeepSniffer as discussed by the authors proposes a learning-based model extraction framework to obtain the complete model architecture information without any prior knowledge of the victim model, which is robust to architectural and system noises introduced by the complex memory hierarchy and diverse run-time system optimizations.
Proceedings ArticleDOI

Neural Network Model Extraction Attacks in Edge Devices by Hearing Architectural Hints

TL;DR: This work is the first to propose such accurate model extraction techniques and demonstrate an end-to-end attack experimentally in the context of an off-the-shelf Nvidia GPU platform with full system stack.
Journal ArticleDOI

Tianjic: A Unified and Scalable Chip Bridging Spike-Based and Continuous Neural Computation

TL;DR: A unified model description framework and a unified processing architecture (Tianjic), which covers the full stack from software to hardware, and a compatible routing infrastructure that enables homogeneous and heterogeneous scalability on a decentralized many-core network.