Approximately 90 per cent of the world's power is generated by heat engines that use fossil fuel combustion as a heat source and typically operate at 30-40 per cent efficiency, such that roughly 15 terawatts of heat is lost to the environment. Thermoelectric modules could potentially convert part of this low-grade waste heat to electricity. Their efficiency depends on the thermoelectric figure of merit ZT of their material components, which is a function of the Seebeck coefficient, electrical resistivity, thermal conductivity and absolute temperature. Over the past five decades it has been challenging to increase ZT > 1, since the parameters of ZT are generally interdependent. While nanostructured thermoelectric materials can increase ZT > 1 (refs 2-4), the materials (Bi, Te, Pb, Sb, and Ag) and processes used are not often easy to scale to practically useful dimensions. Here we report the electrochemical synthesis of large-area, wafer-scale arrays of rough Si nanowires that are 20-300 nm in diameter. These nanowires have Seebeck coefficient and electrical resistivity values that are the same as doped bulk Si, but those with diameters of about 50 nm exhibit 100-fold reduction in thermal conductivity, yielding ZT = 0.6 at room temperature. For such nanowires, the lattice contribution to thermal conductivity approaches the amorphous limit for Si, which cannot be explained by current theories. Although bulk Si is a poor thermoelectric material, by greatly reducing thermal conductivity without much affecting the Seebeck coefficient and electrical resistivity, Si nanowire arrays show promise as high-performance, scalable thermoelectric materials.

Enhanced thermoelectric performance of rough silicon nanowires

Rapid progress in the synthesis and processing of materials with structure on nanometer length scales has created a demand for greater scientific understanding of thermal transport in nanoscale devices, individual nanostructures, and nanostructured materials. This review emphasizes developments in experiment, theory, and computation that have occurred in the past ten years and summarizes the present status of the field. Interfaces between materials become increasingly important on small length scales. The thermal conductance of many solid–solid interfaces have been studied experimentally but the range of observed interface properties is much smaller than predicted by simple theory. Classical molecular dynamics simulations are emerging as a powerful tool for calculations of thermal conductance and phonon scattering, and may provide for a lively interplay of experiment and theory in the near term. Fundamental issues remain concerning the correct definitions of temperature in nonequilibrium nanoscale systems. Modern Si microelectronics are now firmly in the nanoscale regime—experiments have demonstrated that the close proximity of interfaces and the extremely small volume of heat dissipation strongly modifies thermal transport, thereby aggravating problems of thermal management. Microelectronic devices are too large to yield to atomic-level simulation in the foreseeable future and, therefore, calculations of thermal transport must rely on solutions of the Boltzmann transport equation; microscopic phonon scattering rates needed for predictive models are, even for Si, poorly known. Low-dimensional nanostructures, such as carbon nanotubes, are predicted to have novel transport properties; the first quantitative experiments of the thermal conductivity of nanotubes have recently been achieved using microfabricated measurement systems. Nanoscale porosity decreases the permittivity of amorphous dielectrics but porosity also strongly decreases the thermal conductivity. The promise of improved thermoelectric materials and problems of thermal management of optoelectronic devices have stimulated extensive studies of semiconductor superlattices; agreement between experiment and theory is generally poor. Advances in measurement methods, e.g., the 3ω method, time-domain thermoreflectance, sources of coherent phonons, microfabricated test structures, and the scanning thermal microscope, are enabling new capabilities for nanoscale thermal metrology.

/pdf/nanoscale-thermal-transport-1frv881kzm.pdf

Nanoscale thermal transport

Approximately 90 per cent of the world’s power is generated by heat engines that use fossil fuel combustion as a heat source and typically operate at 30–40 per cent efficiency, such that roughly 15 terawatts of heat is lost to the environment. Thermoelectric modules could potentially convert part of this low-grade waste heat to electricity. Their efficiency depends on the thermoelectric figure of merit ZT of their material components, which is a function of the Seebeck coefficient, electrical resistivity, thermal conductivity and absolute temperature. Over the past five decades it has been challenging to increase ZT > 1, since the parameters of ZT are generally interdependent. While nanostructured thermoelectric materials can increase ZT > 1 (refs 2–4), the materials (Bi, Te, Pb, Sb, and Ag) and processes used are not often easy to scale to practically useful dimensions. Here we report the electrochemical synthesis of large-area, wafer-scale arrays of rough Si nanowires that are 20–300 nm in diameter. These nanowires have Seebeck coefficient and electrical resistivity values that are the same as doped bulk Si, but those with diameters of about 50 nm exhibit 100-fold reduction in thermal conductivity, yielding ZT = 0.6 at room temperature. For such nanowires, the lattice contribution to thermal conductivity approaches the amorphous limit for Si, which cannot be explained by current theories. Although bulk Si is a poor thermoelectric material, by greatly reducing thermal conductivity without much affecting the Seebeck coefficient and electrical resistivity, Si nanowire arrays show promise as high-performance, scalable thermoelectric materials.

http://absimage.aps.org/image/MAR08/MWS_MAR08-2007-020111.pdf

Enhanced Thermoelectric Performance in Rough Silicon Nanowires

Semiconductor nanowires represent an important class of nanostructure building block for photovoltaics as well as direct solar-to-fuel application because of their high surface area, tunable bandgap and efficient charge transport and collection. In this talk, I will highlight several recent examples in this lab using semiconductor nanowires and their heterostructures for the purpose of solar energy harvesting. In addition, we have also discovered that the thermoconductivity of the silicon nanowires can be significantly reduced due to phonon scattering, pointing to a very promising approach to design better thermoelectrical materials. It is important to note that the engines that generate most of the world's power typically operate at only 30–40 per cent efficiency, releasing roughly 15 terawatts of heat to the environment. If this “wasted heat” could be recycled, the impact globally would be enormous. Our silicon nanowire thermoelectric technology could have a significant impact in alternative energy generation.

Semiconductor nanowires for energy conversion.

Emerging challenges and materials for thermal management of electronics

Self heating diminishes the reliability of silicon-on-insulator (SOI) transistors, particularly those that must withstand electrostatic discharge (ESD) pulses. This problem is alleviated by lateral thermal conduction in the silicon device layer, whose thermal conductivity is not known. The present work develops a technique for measuring this property, and provides data for layers in wafers fabricated using bond-and-etch-back (BESOI) technology. The room-temperature thermal conductivity data decrease with decreasing layer thickness, d s , to a value nearly 40 percent less than that of bulk silicon for d s = 0.42 μm, The agreement of the data with the predictions of phonon transport analysis between 20 and 300 K strongly indicates that phonon scattering on layer boundaries is responsible for a large part of the reduction. The reduction is also due in part to concentrations of imperfections larger than those in bulk samples. The data show that the buried oxide in BESOI wafers has a thermal conductivity that is nearly equal to that of bulk fused quartz. The present work will lead to more accurate thermal simulations of SOI transistors and cantilever MEMS structures.

Temperature-Dependent Thermal Conductivity of Single-Crystal Silicon Layers in SOI Substrates

Temperature fields in microdevices made from silicon-on-insulator (SOI) wafers are strongly influenced by the lateral thermal conductivity of the silicon overlayer, which is diminished by phonon scattering on the layer boundaries. This study measures the thermal conductivity of single-crystal silicon layers in SOI substrates at temperatures between 20 and 320 K using Joule heating and electrical-resistance thermometry in microfabricated structures. Data for layers of thickness between 0.4 and 1.6 μm demonstrate the large reduction resulting from phonon-boundary scattering, particularly at low temperatures, and are consistent with predictions based on the phonon Boltzmann transport equation.

https://nanoheat.stanford.edu/sites/default/files/publications/A23.pdf

Y. K. Leung

Papers

Temperature-Dependent Thermal Conductivity of Single-Crystal Silicon Layers in SOI Substrates

Phonon-boundary scattering in thin silicon layers