This paper presents a subthreshold voltage reference in which the output voltage is scalable depending on the number of stacked PMOS transistors. A key advantage is that its output voltage can be higher than that obtained with conventional low-power subthreshold voltage references. The proposed reference uses native NMOS transistors as a current source and develops a reference voltage by stacking one or more PMOS transistors. The temperature coefficient of the reference voltage is compensated by setting the size ratio of the native NMOS and stacked pMOS transistors to cancel temperature dependence of transistor threshold voltage and thermal voltage. Also, the transistor size is determined considering the trade-off between diode current between n-well and p-sub and process variation. Prototype chips are fabricated in a 0.18- $\mu \text{m}$ CMOS process. Measurement results from three wafers show $3\sigma $ inaccuracy of ±1.0% from 0 °C to 100 °C after a single room-temperature trim. The proposed voltage reference achieves a line sensitivity of 0.31%/V and a power supply rejection of −41 dB while consuming 35 pW from 1.4 V at room temperature.

A Subthreshold Voltage Reference With Scalable Output Voltage for Low-Power IoT Systems

This paper proposes a novel CMOS bandgap reference (BGR) with high-order curvature-compensation by using MOS transistors operating in weak inversion region. The mechanism of the proposed curvature-compensation technique is analyzed thoroughly and the corresponding BGR circuit was implemented in standard CMOS 0.18 μm technology. The experimental results show that the proposed BGR achieves 4.5 ppm/°C over the temperature range of -40°C to 120°C at 1.2 V supply voltage. It consumes only 36 μA. In addition, it achieves line regulation performance of 0.054%/V. It is suitable for low-power applications requiring references with high precision.

A Novel 1.2–V 4.5-ppm/°C Curvature-Compensated CMOS Bandgap Reference

We present a low-voltage low-power CMOS subthreshold voltage reference with no resistors and no bipolar junction transistors in a wide temperature range. The temperature stability is improved by second-order compensation. By employing a bulk-driven technique and the MOS transistors working in the subthreshold region, the supply voltage and the power dissipation are reduced. Moreover, a trimming circuit is adopted to compensate for the process-related reference voltage variation. The proposed voltage reference has been fabricated with the 0.18- $\mu\text{m} $ 1.8-V CMOS process. The measurement results show that the minimum power supply voltage is 0.45 V, the power consumption is 14.6 nW, the average temperature coefficient measured from $-40\ ^{\circ}\mbox{C} $ to 125 °C is 63.6 ppm/°C, and the line regulation is 1.2 mV/V in the power supply voltage ranging from 0.45 to 1.8 V. In addition, the chip area is 0.012 mm2.

A 0.45-V, 14.6-nW CMOS Subthreshold Voltage Reference With No Resistors and No BJTs

Most systems require a voltage reference independent of variation of power supply, process, or temperature, and a bandgap voltage reference (BGR) often serves this purpose. For ultra-low power (ULP) systems, the BGR may constitute a significant component of standby power, and the system start-up voltage is often determined by the voltage, V in , at which the BGR becomes operational. Lowering V in can also allow an ULP system to continue operation longer as its battery or energy harvested input voltage decreases. The minimum V in for state-of-the-art BGRs is restricted by V EB +V DS [1], where V EB is the emitter-base voltage of a pnp transistor, and V DS is the drain-source saturation voltage of a MOS transistor. Recent work brings the V in voltage down to 700mV [2]. There is a need to reduce the standby power and V in of a BGR to increase the lifetime of ULP systems. This paper presents a BGR circuit with measured minimum operating V in of 500mV, reducing the V in of [2] by 1.4x. Further, the power consumption of the proposed circuit is 32nW, which is 1.6x lower than the non-duty cycled BGR reported in [2]. A 2x-charge pump based bandgap core, a switched-capacitor network (SCN), and a current controlled oscillator and clock doubler circuit enable a BGR with a temperature variation of 75ppm/°C and power supply rejection (PSR) of up to −52dB at DC.

5.4 A 32nW bandgap reference voltage operational from 0.5V supply for ultra-low power systems

Ultra-low-power (ULP) sensor technologies for the future internet of things have presented challenges in ULP implementation of reference circuits while keeping traditional requirements of stable performance. For voltage reference circuits, as an essential block in SoCs to generate various internal supply voltages, the bandgap voltage-reference (BGVR) scheme has been widely used since it provides a well-defined value with strong immunity to process/voltage/temperature variations. Nanowatt-consuming BGVR circuits have been recently proposed using a capacitor network [4] and a leakage-based proportional-to-absolute-temperature (PTAT) circuit [5]. On the other hand, the current reference circuit that is required to set internal bias current still presents difficulties in achieving both stable performance and ULP consumption. The general approach to building a current reference is to use a BGVR with additional resistors for V-to-I conversion. Though it can provide a well-defined stable current reference, it also requires excessively large resistance for ULP consumption. Another approach is a CMOS-based current reference circuit that tries to make the exponential term in the subthreshold current equation constant or temperature-independent, hence reducing process and temperature dependencies. While CMOS reference circuits have achieved ULP implementations, the current is still determined by a number of process and design parameters, resulting in large sensitivity to process variations. This paper presents a sub-10nW bandgap-reference (BGR) circuit that implements both voltage and current references in one circuit. The BGR circuit is implemented with a 0.18µm CMOS process and generates voltage and a current references of 1.238V and 6.64nA while consuming 9.3nW. The voltage and current references show standard deviations of 0.43% and 1.19% with temperature coefficients of 26ppm/°C and 283ppm/°C, respectively.

5.8 A 9.3nW all-in-one bandgap voltage and current reference circuit

This paper presents bandgap reference (BGR) and sub-BGR circuits for nanowatt LSIs. The circuits consist of a nano-ampere current reference circuit, a bipolar transistor, and proportional-to-absolute-temperature (PTAT) voltage generators. The proposed circuits avoid the use of resistors and contain only MOSFETs and one bipolar transistor. Because the sub-BGR circuit divides the output voltage of the bipolar transistor without resistors, it can operate at a sub-1-V supply. The experimental results obtained in the 0.18-μm CMOS process demonstrated that the BGR circuit could generate a reference voltage of 1.09 V and the sub-BGR circuit could generate one of 0.548 V. The power dissipations of the BGR and sub-BGR circuits corresponded to 100 and 52.5 nW.

Y. Osaki

Papers

1.2-V Supply, 100-nW, 1.09-V Bandgap and 0.7-V Supply, 52.5-nW, 0.55-V Subbandgap Reference Circuits for Nanowatt CMOS LSIs